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Dual ACE. TL16C552AM Datasheet

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Dual ACE. TL16C552AM Datasheet






TL16C552AM ACE. Datasheet pdf. Equivalent




TL16C552AM ACE. Datasheet pdf. Equivalent





Part

TL16C552AM

Description

Dual ACE



Feature


TL16C552A, TL16C552AM DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO SLLS18 9D – NOVEMBER 1994 – REVISED JANUAR Y 1999 D IBM PC/AT ™ Compatible D Tw o TL16C550 ACEs D Enhanced Bidirectiona l Printer Port D 16-Byte FIFOs Reduce C PU Interrupts D Up to 16-MHz Clock Rate for up to 1-Mbaud Operation D Transmit , Receive, Line Status, and Data Set In terrupts on Each Channel.
Manufacture

Texas Instruments

Datasheet
Download TL16C552AM Datasheet


Texas Instruments TL16C552AM

TL16C552AM; Independently Controlled D Individual M odem Control Signals for Each Channel D Programmable Serial Interface Charact eristics for Each Channel: – 5-, 6-, 7-, or 8-Bit Characters – Even, Odd, or No Parity Bit Generation and Detecti on – 1-, 1-1/2-, or 2-Stop Bit Genera tion D 3-State Outputs Provide TTL Driv e for the Data and Control Bus on Each Channel D Hardware and S.


Texas Instruments TL16C552AM

oftware Compatible With TL16C452 HV or FN PACKAGE (TOP VIEW) RXRDY0 DCD1 GND RI1 DSR1 CLK CS1 TRI PEMD ACK PE BUSY S LCT VDD ERR SIN1 RXRDY1 SOUT1 DTR1 RTS 1 CTS1 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 TXRDY0 VDD RTS0 DTR0 SOUT0 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 10 60 11 59 12 58 13 57 14 56 15 55 16 54 17 53 18 52 19 51 20 5 0 21 49 22 48 .


Texas Instruments TL16C552AM

23 47 24 46 25 45 26 44 27 28 2 9 30 31 32 33 34 35 36 37 38 39 40 41 4 2 43 INT1 INT2 SLIN INIT AFD STB GND P D0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 INT0 BDO GND CTS0 DCD0 RI0 DSR0 CS0 A2 A1 A0 I OW IOR CS2 RESET VDD SIN0 TXRDY1 ENIRQ Please be aware that an important noti ce concerning availability, standard wa rranty, and use in critical application s of Texas Instrum.

Part

TL16C552AM

Description

Dual ACE



Feature


TL16C552A, TL16C552AM DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO SLLS18 9D – NOVEMBER 1994 – REVISED JANUAR Y 1999 D IBM PC/AT ™ Compatible D Tw o TL16C550 ACEs D Enhanced Bidirectiona l Printer Port D 16-Byte FIFOs Reduce C PU Interrupts D Up to 16-MHz Clock Rate for up to 1-Mbaud Operation D Transmit , Receive, Line Status, and Data Set In terrupts on Each Channel.
Manufacture

Texas Instruments

Datasheet
Download TL16C552AM Datasheet




 TL16C552AM
TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
D IBM PC/AT Compatible
D Two TL16C550 ACEs
D Enhanced Bidirectional Printer Port
D 16-Byte FIFOs Reduce CPU Interrupts
D Up to 16-MHz Clock Rate for up to 1-Mbaud
Operation
D Transmit, Receive, Line Status, and Data
Set Interrupts on Each Channel
Independently Controlled
D Individual Modem Control Signals for Each
Channel
D Programmable Serial Interface
Characteristics for Each Channel:
– 5-, 6-, 7-, or 8-Bit Characters
– Even, Odd, or No Parity Bit Generation
and Detection
– 1-, 1-1/2-, or 2-Stop Bit Generation
D 3-State Outputs Provide TTL Drive for the
Data and Control Bus on Each Channel
D Hardware and Software Compatible With
TL16C452
HV or FN PACKAGE
(TOP VIEW)
SOUT1
DTR1
RTS1
CTS1
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
TXRDY0
VDD
RTS0
DTR0
SOUT0
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
10
60
11
59
12
58
13
57
14
56
15
55
16
54
17
53
18
52
19
51
20
50
21
49
22
48
23
47
24
46
25
45
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
INT1
INT2
SLIN
INIT
AFD
STB
GND
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
INT0
BDO
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
IBM PC/AT is a trademark of International Business Machines Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1999, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1




 TL16C552AM
TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
PN PACKAGE
(TOP VIEW)
NC
NC
RXRDY1
SIN1
ERR
VDD
SLCT
BUSY
PE
ACK
PEMD
TRI
CS1
CLK
DSR1
RI1
GND
DCD1
RXRDY0
NC
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
1
60
2
59
3
58
4
57
5
56
6
55
7
54
8
53
9
52
10
51
11
50
12
49
13
48
14
47
15
46
16
45
17
44
18
43
19
42
20
41
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
NC
ENIRQ
TXRDY1
SIN0
VDD
RESET
CS2
IOR
IOW
A0
A1
A2
CS0
DSR0
RI0
DCD0
CTS0
GND
NC
NC
description
The TL16C552A is an enhanced dual-channel version of the popular TL16C550B asynchronous
communications element (ACE). The device serves two serial input /output interfaces simultaneously in
microcomputer or microprocessor-based systems. Each channel performs serial-to-parallel conversion on data
characters received from peripheral devices or modems and parallel-to-serial conversion on data characters
transmitted by the CPU. The complete status of each channel of the dual ACE can be read at any time during
functional operation by the CPU. The information obtained includes the type and condition of the transfer
operations being performed and the error conditions encountered.
In addition to its dual communications interface capabilities, the TL16C552A provides the user with a
bidirectional parallel data port that fully supports the parallel Centronics-type printer interface. The parallel port
and the two serial ports provide IBM PC/AT-compatible computers with a single device to serve the three system
ports. A programmable baud rate generator that can divide the timing reference clock input by a divisor between
1 and (216 – 1) is included.
The TL16C552A is available in a 68-pin plastic-leaded chip-carrier (FN) package and a 80-pin TQFP (PN)
package. The TL16C552AM is available in a 68-pin ceramic quad flat (HV) package.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265




 TL16C552AM
functional block diagram
28
CTS0
31
DSR0
DCD0 29
30
RI0
SIN0 41
CS0 32
DB0 – DB7 14 – 21
CTS1 13
DSR1 5
DCD1 8
RI1 6
SIN1 62
CS1 3
TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
8
8
ACE
#1
ACE
#2
24
RTS0
25
DTR0
26 SOUT0
45
INT0
9 RXRDY0
22 TXRDY0
12 RTS1
11 DTR1
10 SOUT1
60 INT1
61 RXRDY1
42 TXRDY1
35 – 33 3
A0 – A2
36
IOW
37
IOR
39
RESET
4
CLK
Select
and
Control
Logic
8
63
ERR
65
SLCT
66
BUSY
PE 67
ACK 68
PEMD 1
CS2 38
ENIRQ 43
Parallel
Port
44
BDO
8 53 – 46 PD0 – PD7
57 INIT
56 AFD
55 STB
58 SLIN
59 INT2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3






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