CMOS Quad 2-Input NOR Gate
Data sheet acquired from Harris Semiconductor SCHS016C – Revised September 2003
The CD4001UB types are supplied in 14-le...
Description
Data sheet acquired from Harris Semiconductor SCHS016C – Revised September 2003
The CD4001UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
Copyright © 2003, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
4-Feb-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package Eco Plan
(1)
Drawing
Qty
(2)
CD4001UBE CD4001UBEE4
CD4001UBF CD4001UBF3A
CD4001UBM CD4001UBM96 CD4001UBPW CD4001UBPWR CD4001UBPWRG4
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
PDIP PDIP CDIP CDIP SOIC SOIC TSSOP TSSOP TSSOP
N
14
25 RoHS & Green
N
14
25 RoHS & Green
J
14
1
Non-RoHS
& Green
J
14
1
Non-RoHS
& Green
D
14
50 RoHS & Green
D
14 2500 RoHS & Green
PW
14
90 RoHS & Green
PW 14 2000 RoHS & Green
PW 14 2000 RoHS & Green
Lead finish/ Ball material
(6)
NIPDAU NIPDAU
SNPB
SNPB
NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU
MSL Peak Temp Op Temp (°C)
(3)
N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type
-55 to 125 -55 to 125 -55 to 125
N / A for Pkg Type -55 to 125
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
-55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125
Device Marking
(4/5)
CD4001UBE CD4001UBE CD4001UBF
CD4001UBF3A
CD4001UBM CD4001UB...
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