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BUS SWITCH. SN74CBT3305C Datasheet

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BUS SWITCH. SN74CBT3305C Datasheet






SN74CBT3305C SWITCH. Datasheet pdf. Equivalent




SN74CBT3305C SWITCH. Datasheet pdf. Equivalent





Part

SN74CBT3305C

Description

DUAL FET BUS SWITCH



Feature


www.ti.com SN74CBT3305C DUAL FET BUS SW ITCH 5-V BUS SWITCH WITH –2-V UNDERSH OOT PROTECTION SCDS125B – SEPTEMBER 2 003 – REVISED AUGUST 2005 FEATURES • Undershoot Protection for OFF Isola tion on A and B Ports up to –2 V • Bidirectional Data Flow With Near-Zero Propagation Delay • Low ON-State Resi stance (ron) Characteristics (ron = 3 Typ) • Low Input/Output Capacit.
Manufacture

Texas Instruments

Datasheet
Download SN74CBT3305C Datasheet


Texas Instruments SN74CBT3305C

SN74CBT3305C; ance Minimizes Loading and Signal Distor tion (Cio(OFF) = 5 pF Typ) • Data and Control Inputs Provide Undershoot Clam p Diodes • Low Power Consumption (ICC = 3 µA Max) • VCC Operating Range F rom 4 V to 5.5 V • Data I/Os Support 0- to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V) Control Inputs Can Be Driven by TTL o r 5-V/3.3-V CMOS Outputs • Io.


Texas Instruments SN74CBT3305C

ff Supports Partial-Power-Down Mode Oper ation • Latch-Up Performance Exceeds 100 mA Per JESD 78, ClassII • ESD Per formance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) • Supports Both Digital and Analog Appli cations: USB Interface, Bus Isolation, Low-Distortion Signal Gating xxx xxx D , DGK, OR PW PACKAGE (TOP VI.


Texas Instruments SN74CBT3305C

EW) 1OE 1 1A 2 1B 3 GND 4 8 VCC 7 2OE 6 2B 5 2A DESCRIPTION/ORDERING INFORMA TION The SN74CBT3305C is a high-speed T TL-compatible FET bus switch with low O N-state resistance (ron), allowing for minimal propagation delay. Active under shoot-protection circuitry on the A and B ports of the device provides protect ion for undershoot up to –2 V by sens ing an undershoot ev.

Part

SN74CBT3305C

Description

DUAL FET BUS SWITCH



Feature


www.ti.com SN74CBT3305C DUAL FET BUS SW ITCH 5-V BUS SWITCH WITH –2-V UNDERSH OOT PROTECTION SCDS125B – SEPTEMBER 2 003 – REVISED AUGUST 2005 FEATURES • Undershoot Protection for OFF Isola tion on A and B Ports up to –2 V • Bidirectional Data Flow With Near-Zero Propagation Delay • Low ON-State Resi stance (ron) Characteristics (ron = 3 Typ) • Low Input/Output Capacit.
Manufacture

Texas Instruments

Datasheet
Download SN74CBT3305C Datasheet




 SN74CBT3305C
www.ti.com
SN74CBT3305C
DUAL FET BUS SWITCH
5-V BUS SWITCH WITH –2-V UNDERSHOOT PROTECTION
SCDS125B – SEPTEMBER 2003 – REVISED AUGUST 2005
FEATURES
Undershoot Protection for OFF Isolation on A
and B Ports up to –2 V
Bidirectional Data Flow With Near-Zero
Propagation Delay
Low ON-State Resistance (ron) Characteristics
(ron = 3 Typ)
Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(Cio(OFF) = 5 pF Typ)
Data and Control Inputs Provide Undershoot
Clamp Diodes
Low Power Consumption
(ICC = 3 µA Max)
VCC Operating Range From 4 V to 5.5 V
Data I/Os Support 0- to 5-V Signaling Levels
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog
Applications: USB Interface, Bus Isolation,
Low-Distortion Signal Gating
xxx
xxx
D, DGK, OR PW PACKAGE
(TOP VIEW)
1OE 1
1A 2
1B 3
GND 4
8 VCC
7 2OE
6 2B
5 2A
DESCRIPTION/ORDERING INFORMATION
The SN74CBT3305C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing
for minimal propagation delay. Active undershoot-protection circuitry on the A and B ports of the device provides
protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the
proper OFF state.
The SN74CBT3305C is organized as two 1-bit bus switches with separate output-enable (1OE, 2OE) inputs. It
can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE is high, the associated 1-bit bus
switch is ON, and the A port is conncected to the B port, allowing bidirectional data flow between ports. When
OE is low, the associated 1-bit bus switch is OFF, and the high-impedance state exists between the A and B
ports.
TA
–40°C to 85°C
ORDERING INFORMATION
PACKAGE (1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
SOIC – D
Tube
Tape and reel
SN74CBT3305CD
SN74CBT3305CDR
CU305C
VSSOP – DGK
Tape and reel
SN74CBT3305CDGKR
SNR
TSSOP – PW
Tube
Tape and reel
SN74CBT3305CPW
SN74CBT3305CPWR
CU305C
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2005, Texas Instruments Incorporated




 SN74CBT3305C
SN74CBT3305C
DUAL FET BUS SWITCH
5-V BUS SWITCH WITH –2-V UNDERSHOOT PROTECTION
SCDS125B – SEPTEMBER 2003 – REVISED AUGUST 2005
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
This device is fully specified for partial-power-down application using Ioff. The Ioff feature ensures that damaging
current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
INPUT
OE
H
L
FUNCTION TABLE
(EACH BUS SWITCH)
INPUT/OUTPUT
A
B
Z
FUNCTION
A port = B port
Disconnect
LOGIC DIAGRAM (POSITIVE LOGIC)
2
1A
1
1OE
3
SW
1B
5
2A
7
2OE
6
SW
2B
SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW)
A
B
Undershoot-
Protection Circuit
EN(1)
(1) EN is the internal enable signal applied to the switch.
2




 SN74CBT3305C
www.ti.com
SN74CBT3305C
DUAL FET BUS SWITCH
5-V BUS SWITCH WITH –2-V UNDERSHOOT PROTECTION
SCDS125B – SEPTEMBER 2003 – REVISED AUGUST 2005
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage
VIN
Control input voltage range(2)(3)
VI/O
Switch I/O voltage range(2)(3)(4)
IIK
Control input clamp current
II/OK
I/O port clamp current
II/O
ON-state switch current(5)
Continuous current through VCC or GND
θJA
Package thermal impedance(6)
Tstg
Storage temperature range
VIN < 0
VI/O < 0
D package
DGK package
PW package
MIN MAX UNIT
–0.5
7V
–0.5
7V
–0.5
7V
–50 mA
–50 mA
±128 mA
±100 mA
97
179 °C/W
149
–65
150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) VI and VO are used to denote specific conditions for VI/O.
(5) II and IO are used to denote specific conditions for II/O.
(6) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions(1)
VCC
Supply voltage
VIH
High-level control input voltage
VIL
Low-level control input voltage
VI/O
Data input/output voltage
TA
Operating free-air temperature
MIN
MAX UNIT
4
5.5 V
2
5.5 V
0
0.8 V
0
5.5 V
–40
85 °C
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3






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