SN74CBT3125

SN74CBT3125 QUADRUPLE FET BUS SWITCH D Standard ’125-Type Pinout (D, DB, DGV, and PW Packages) SCDS021I − MAY 1995 − REVISED SEPTEMBER 2002 D 5-Ω Switch Connection Between Two Ports D TTL-Compatible Input Levels D, DB, DGV, OR PW PACKAGE (TOP VIEW) 1OE 1 1A 2 1B 3 2OE 4 2A 5 2B 6 GND 7 14 VCC 13 4OE 12 4A 11 4B 10 3OE 9 3A 8 3B RGY PACKAGE (TOP VIEW) 1OE VCC 1 1A 2 1B 3 2OE 4 2A 5 2B 6 7 14 13 4OE 12 4A 11 4B 10 3OE 9 3A 8 DBQ PACKAGE (TOP VIEW) NC 1 1OE 2 1A 3 1B 4 2OE 5 2A 6 2B 7 GND 8 16 VCC 15 4OE 14 4A 13 4B 12 3OE 11 3A 10 3B 9 NC NC − No internal connection GND 3B description/ordering information The SN74CBT3125 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE) input is high. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING QFN − RGY Tape and reel SN74CBT3125RGYR CU125 SOIC − D Tube Tape and reel SN74CBT3125D SN74CBT3125DR CBT3125 −40°C to 85°C SSOP − DB Tape and reel SSOP (QSOP) − DBQ Tape and reel SN74CBT3125DBR CU125 SN74CBT3125DBQR CU125 TSSOP − PW Tape and reel SN74CBT3125PWR CU125 TVSOP − DGV Tape and reel SN74CBT3125DGVR CU125 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design gui...