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FET MULTIPLEXER/DEMULTIPLEXER. SN74CBT3253PW Datasheet

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FET MULTIPLEXER/DEMULTIPLEXER. SN74CBT3253PW Datasheet






SN74CBT3253PW MULTIPLEXER/DEMULTIPLEXER. Datasheet pdf. Equivalent




SN74CBT3253PW MULTIPLEXER/DEMULTIPLEXER. Datasheet pdf. Equivalent





Part

SN74CBT3253PW

Description

DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER



Feature


D TTL-Compatible Input Levels D, DB, DBQ , OR PW PACKAGE (TOP VIEW) 1OE 1 S1 2 1B4 3 1B3 4 1B2 5 1B1 6 1A 7 GND 8 16 VCC 15 2OE 14 S0 13 2B4 12 2B3 11 2B2 1 0 2B1 9 2A SN74CBT3253 DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER SCDS018O − MAY 1995 − REVISED JANUARY 2004 RGY PACKAGE (TOP VIEW) 1OE VCC 1 S1 2 1B4 3 1B3 4 1B2 5 1B1 6 1A 7 8 16 15 2OE 14 S0 13 2B4 12 2B3 11.
Manufacture

Texas Instruments

Datasheet
Download SN74CBT3253PW Datasheet


Texas Instruments SN74CBT3253PW

SN74CBT3253PW; 2B2 10 2B1 9 GND 2A description/order ing information The SN74CBT3253 is a du al 1-of-4 high-speed TTL-compatible FET multiplexer/demultiplexer. The low on- state resistance of the switch allows c onnections to be made with minimal prop agation delay. 1OE, 2OE, S0, and S1 sel ect the appropriate B output for the A- input data. ORDERING INFORMATION TA PACKAGE† ORDERABL.


Texas Instruments SN74CBT3253PW

E PART NUMBER TOP-SIDE MARKING QFN − RGY Tape and reel SN74CBT3253RGYR CU2 53 SOIC − D Tube Tape and reel SN7 4CBT3253D SN74CBT3253DR CBT3253 −40 °C to 85°C SSOP − DB Tape and reel SSOP (QSOP) − DBQ Tape and reel SN 74CBT3253DBR CU253 SN74CBT3253DBQR CU25 3 TSSOP − PW Tube Tape and reel SN 74CBT3253PW SN74CBT3253PWR CU253 † Package drawings, standard packing.


Texas Instruments SN74CBT3253PW

quantities, thermal data, symbolization , and PCB design guidelines are availab le at www.ti.com/sc/package. 1OE X H L L L L FUNCTION TABLE INPUTS 2OE S1 S 0 FUNCTION H X X Disconnect 1A and 2A X X X Disconnect 1A and 2A L L L 1A to 1B1 and 2A to 2B1 L L H 1A to 1B2 and 2A to 2B2 L H L 1A t o 1B3 and 2A to 2B3 L H H 1A to 1B4 and 2A to 2B4 Pl.

Part

SN74CBT3253PW

Description

DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER



Feature


D TTL-Compatible Input Levels D, DB, DBQ , OR PW PACKAGE (TOP VIEW) 1OE 1 S1 2 1B4 3 1B3 4 1B2 5 1B1 6 1A 7 GND 8 16 VCC 15 2OE 14 S0 13 2B4 12 2B3 11 2B2 1 0 2B1 9 2A SN74CBT3253 DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER SCDS018O − MAY 1995 − REVISED JANUARY 2004 RGY PACKAGE (TOP VIEW) 1OE VCC 1 S1 2 1B4 3 1B3 4 1B2 5 1B1 6 1A 7 8 16 15 2OE 14 S0 13 2B4 12 2B3 11.
Manufacture

Texas Instruments

Datasheet
Download SN74CBT3253PW Datasheet




 SN74CBT3253PW
D TTL-Compatible Input Levels
D, DB, DBQ, OR PW PACKAGE
(TOP VIEW)
1OE 1
S1 2
1B4 3
1B3 4
1B2 5
1B1 6
1A 7
GND 8
16 VCC
15 2OE
14 S0
13 2B4
12 2B3
11 2B2
10 2B1
9 2A
SN74CBT3253
DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER
SCDS018O − MAY 1995 − REVISED JANUARY 2004
RGY PACKAGE
(TOP VIEW)
1
S1 2
1B4 3
1B3 4
1B2 5
1B1 6
1A 7
8
16
15 2OE
14 S0
13 2B4
12 2B3
11 2B2
10 2B1
9
description/ordering information
The SN74CBT3253 is a dual 1-of-4 high-speed TTL-compatible FET multiplexer/demultiplexer. The low
on-state resistance of the switch allows connections to be made with minimal propagation delay.
1OE, 2OE, S0, and S1 select the appropriate B output for the A-input data.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN − RGY
Tape and reel SN74CBT3253RGYR CU253
SOIC − D
Tube
Tape and reel
SN74CBT3253D
SN74CBT3253DR
CBT3253
−40°C to 85°C SSOP − DB
Tape and reel
SSOP (QSOP) − DBQ Tape and reel
SN74CBT3253DBR CU253
SN74CBT3253DBQR CU253
TSSOP − PW
Tube
Tape and reel
SN74CBT3253PW
SN74CBT3253PWR
CU253
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
1OE
X
H
L
L
L
L
FUNCTION TABLE
INPUTS
2OE S1 S0
FUNCTION
H
X
X
Disconnect 1A and 2A
X
X
X
Disconnect 1A and 2A
L
L
L
1A to 1B1 and 2A to 2B1
L
L
H
1A to 1B2 and 2A to 2B2
L
H
L
1A to 1B3 and 2A to 2B3
L
H
H
1A to 1B4 and 2A to 2B4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 2004, Texas Instruments Incorporated
1




 SN74CBT3253PW
SN74CBT3253
DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER
SCDS018O − MAY 1995 − REVISED JANUARY 2004
logic diagram (positive logic)
7
1A
9
2A
6
1B1
5
1B2
4
1B3
3
1B4
10
2B1
11
2B2
12
2B3
13
2B4
14
S0
2
S1
1
1OE
15
2OE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
(see Note 2): DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90°C/W
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265




 SN74CBT3253PW
SN74CBT3253
DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER
SCDS018O − MAY 1995 − REVISED JANUARY 2004
recommended operating conditions (see Note 4)
MIN MAX UNIT
VCC Supply voltage
4 5.5 V
VIH High-level control input voltage
2
V
VIL Low-level control input voltage
0.8 V
TA Operating free-air temperature
−40 85 °C
NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYPMAX UNIT
VIK
II
ICC
ΔICC‡
Ci
Cio(OFF)
Control inputs
Control inputs
A port
B port
VCC = 4.5 V,
VCC = 5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VI = 3 V or 0
VO = 3 V or 0,
II = −18 mA
VI = 5.5 V or GND
IO = 0,
One input at 3.4 V,
VI = VCC or GND
Other inputs at VCC or GND
OE = VCC
−1.2 V
±1 μA
3 μA
2.5 mA
3.5
pF
10
pF
4
II = 64 mA
ron§
VCC = 4.5 V
VI = 0
II = 30 mA
5
7
5
7Ω
VI = 2.4 V,
II = 15 mA
10
15
All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
§ Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined
by the lower voltage of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4 V
MIN MAX
VCC = 5 V
± 0.5 V
MIN MAX
UNIT
tpd¶
A or B
B or A
0.35
0.25 ns
tpd
S
A or B
6.6 1.6 6.2 ns
S
7.1 1.3 6.3
ten
A or B
ns
OE
7.3 1.4 6.4
S
7.9 1.1 7.4
tdis
A or B
ns
OE
7.3 2.3
7
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3






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