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Bus Switch. SN74CBT34X245 Datasheet

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Bus Switch. SN74CBT34X245 Datasheet






SN74CBT34X245 Switch. Datasheet pdf. Equivalent




SN74CBT34X245 Switch. Datasheet pdf. Equivalent





Part

SN74CBT34X245

Description

32-Bit FET Bus Switch



Feature


D Member of Texas Instruments’ Widebus + Family D 5-Ω Switch Connection Between Two Ports D TTL-Compatible Inpu t Levels D Flow-Through Architecture Op timizes PCB Layout D Ioff Supports Part ial-Power-Down Mode Operation D Latch-U p Performance Exceeds 100 mA Per JESD 7 8, Class II D ESD Protection Exceeds JE SD 22 – 2000-V Human-Body Model (A114 -A) – 200-V Machine Model .
Manufacture

Texas Instruments

Datasheet
Download SN74CBT34X245 Datasheet


Texas Instruments SN74CBT34X245

SN74CBT34X245; (A115-A) – 1000-V Charged-Device Model (C101) description The SN74CBT34X245 p rovides 32 bits of high-speed TTL-compa tible bus switching. The low on-state r esistance of the switch allows connecti ons to be made with minimal propagation delay. The device is organized as four 8-bit bus switches, two 16-bit bus swi tches, or one 32-bit bus switch. When o utput enable (OE) is.


Texas Instruments SN74CBT34X245

low, the switch is on, and port A is co nnected to port B. When OE is high, the switch is open, and the high-impedance state exists between the two ports. Th is device is fully specified for partia l-powerdown applications using Ioff. Th e Ioff circuitry disables the outputs, preventing damaging current backflow th rough the device when it is powered dow n. SN74CBT34X245 .


Texas Instruments SN74CBT34X245

32-BIT FET BUS SWITCH SCDS089C – MAY 1999 – REVISED MAY 2001 DBB PACKAGE ( TOP VIEW) NC 1 1A1 2 1A2 3 1A3 4 1A4 5 1A5 6 1A6 7 1A7 8 1A8 9 GND 10 NC 11 2 A1 12 2A2 13 2A3 14 2A4 15 2A5 16 2A6 1 7 2A7 18 2A8 19 GND 20 NC 21 3A1 22 3A2 23 3A3 24 3A4 25 3A5 26 3A6 27 3A7 28 3A8 29 GND 30 NC 31 4A1 32 4A2 33 4A3 3 4 4A4 35 4A5 36 4A6 37 4A7 38 4A8 39 GN D 40 80 VCC 79 1OE 78.

Part

SN74CBT34X245

Description

32-Bit FET Bus Switch



Feature


D Member of Texas Instruments’ Widebus + Family D 5-Ω Switch Connection Between Two Ports D TTL-Compatible Inpu t Levels D Flow-Through Architecture Op timizes PCB Layout D Ioff Supports Part ial-Power-Down Mode Operation D Latch-U p Performance Exceeds 100 mA Per JESD 7 8, Class II D ESD Protection Exceeds JE SD 22 – 2000-V Human-Body Model (A114 -A) – 200-V Machine Model .
Manufacture

Texas Instruments

Datasheet
Download SN74CBT34X245 Datasheet




 SN74CBT34X245
D Member of Texas Instruments’ Widebus +
Family
D 5-Switch Connection Between Two Ports
D TTL-Compatible Input Levels
D Flow-Through Architecture Optimizes PCB
Layout
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
description
The SN74CBT34X245 provides 32 bits of
high-speed TTL-compatible bus switching. The
low on-state resistance of the switch allows
connections to be made with minimal propagation
delay.
The device is organized as four 8-bit bus switches,
two 16-bit bus switches, or one 32-bit bus switch.
When output enable (OE) is low, the switch is on,
and port A is connected to port B. When OE is
high, the switch is open, and the high-impedance
state exists between the two ports.
This device is fully specified for partial-power-
down applications using Ioff. The Ioff circuitry
disables the outputs, preventing damaging
current backflow through the device when it is
powered down.
SN74CBT34X245
32-BIT FET BUS SWITCH
SCDS089C – MAY 1999 – REVISED MAY 2001
DBB PACKAGE
(TOP VIEW)
NC 1
1A1 2
1A2 3
1A3 4
1A4 5
1A5 6
1A6 7
1A7 8
1A8 9
GND 10
NC 11
2A1 12
2A2 13
2A3 14
2A4 15
2A5 16
2A6 17
2A7 18
2A8 19
GND 20
NC 21
3A1 22
3A2 23
3A3 24
3A4 25
3A5 26
3A6 27
3A7 28
3A8 29
GND 30
NC 31
4A1 32
4A2 33
4A3 34
4A4 35
4A5 36
4A6 37
4A7 38
4A8 39
GND 40
80 VCC
79 1OE
78 1B1
77 1B2
76 1B3
75 1B4
74 1B5
73 1B6
72 1B7
71 1B8
70 VCC
69 2OE
68 2B1
67 2B2
66 2B3
65 2B4
64 2B5
63 2B6
62 2B7
61 2B8
60 VCC
59 3OE
58 3B1
57 3B2
56 3B3
55 3B4
54 3B5
53 3B6
52 3B7
51 3B8
50 VCC
49 4OE
48 4B1
47 4B2
46 4B3
45 4B4
44 4B5
43 4B6
42 4B7
41 4B8
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2001, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1




 SN74CBT34X245
SN74CBT34X245
32-BIT FET BUS SWITCH
SCDS089C MAY 1999 REVISED MAY 2001
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
40°C to 85°C TVSOP DBB Tape and reel SN74CBT34X245DBBR CBT34X245
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each 8-bit bus switch)
INPUT
OE
FUNCTION
L
A port = B port
H
Disconnect
logic diagram (positive logic)
2
1A1
78
1B1
12
2A1
68
2B1
9
1A8
79
1OE
71
1B8
19
2A8
69
2OE
61
2B8
22
3A1
58
3B1
32
4A1
48
4B1
29
3A8
59
3OE
51
3B8
39
4A8
49
4OE
41
4B8
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θJA (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265




 SN74CBT34X245
SN74CBT34X245
32-BIT FET BUS SWITCH
SCDS089C MAY 1999 REVISED MAY 2001
recommended operating conditions (see Note 3)
MIN MAX UNIT
VCC Supply voltage
4 5.5 V
VIH High-level control input voltage
2
V
VIL Low-level control input voltage
0.8 V
TA Operating free-air temperature
40
85 °C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to TI application report
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYPMAX UNIT
VIK
VCC = 4.5 V,
II = 18 mA
1.2 V
II
VCC = 5.5 V,
VI = 5.5 V or GND
±5 µA
Ioff
VCC = 0,
VI or VO = 0 to 5.5 V
10 µA
ICC
VCC = 5.5 V,
ICCControl inputs VCC = 5.5 V,
IO = 0,
One input at 3.4 V,
VI = VCC or GND
Other inputs at VCC or GND
6 µA
3.5 mA
Ci
Control inputs VI = 3 V or 0
3.5
pF
Cio(OFF)
VO = 3 V or 0,
OE = VCC
5.5
pF
VCC = 4 V,
TYP at VCC = 4 V
VI = 2.4 V,
II = 15 mA
11
17
ron§
VCC = 4.5 V
VI = 0
II = 64 mA
II = 30 mA
5
7
5
7
VI = 2.4 V,
II = 15 mA
8
13
All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
§ Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4 V
MIN MAX
VCC = 5 V
± 0.5 V
MIN MAX
UNIT
tpd
A or B
B or A
0.25 ns
ten
OE
A or B
2.2 6.5 1.9
6 ns
tdis
OE
A or B
1.9 6.2 2.2 6.7 ns
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3






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