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Digital-to-Analog Converter. TLV5613 Datasheet

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Digital-to-Analog Converter. TLV5613 Datasheet






TLV5613 Converter. Datasheet pdf. Equivalent




TLV5613 Converter. Datasheet pdf. Equivalent





Part

TLV5613

Description

12-Bit Parallel Digital-to-Analog Converter



Feature


TLV5613 2.7 V TO 5.5 V 12-BIT PARALLEL D IGITAL-TO-ANALOG CONVERTER WITH POWER D OWN SLAS174B – DECEMBER 1997 – REVI SED NOVEMBER 2000 D 12-Bit Voltage Out put DAC D Single Supply 2.7-V to 5.5-V Operation D Separate Analog and Digital Supplies D ±0.4 LSB Differential Nonl inearity (DNL), ±1.5 LSB Integral Nonl inearity (INL) D Programmable Settling Time vs Power Consumptio.
Manufacture

Texas Instruments

Datasheet
Download TLV5613 Datasheet


Texas Instruments TLV5613

TLV5613; n: 1 µs/4.2 mW in Fast Mode, 3.5 µs/1. 2 mW in Slow Mode D 8-Bit µController Compatible Interface (8+4 Bit) D Power- Down Mode (50 nW) D Rail-to-Rail Output Buffer D Synchronous or Asynchronous U pdate D Monotonic Over Temperature desc ription The TLV5613 is a 12-bit voltage output digital-to-analog converter (DA C) with a 8-bit microcontroller compati ble parallel interfac.


Texas Instruments TLV5613

e. The 8 LSBs, the 4 MSBs and 3 control bits are written using three different addresses. Developed for a wide range o f supply voltages, the TLV5613 can be o perated from 2.7 V to 5.5 V. applicati ons D Digital Servo Control Loops D Bat tery Powered Test Instruments D Digital Offset and Gain Adjustment D Industria l Process Control D Speech Synthesis D Machine and Motion.


Texas Instruments TLV5613

Control Devices D Mass Storage Devices D2 D3 D4 D5 D6 D7 A1 A0 SPD DVDD DW O R PW PACKAGE (TOP VIEW) 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 1 3 9 12 10 11 D1 D0 CS WE LDAC PWD GND OUT REF AVDD The resistor string o utput voltage is buffered by a x2 gain rail-to-rail output buffer. The buffer features a Class A (slow mode: AB) outp ut stage to improv.

Part

TLV5613

Description

12-Bit Parallel Digital-to-Analog Converter



Feature


TLV5613 2.7 V TO 5.5 V 12-BIT PARALLEL D IGITAL-TO-ANALOG CONVERTER WITH POWER D OWN SLAS174B – DECEMBER 1997 – REVI SED NOVEMBER 2000 D 12-Bit Voltage Out put DAC D Single Supply 2.7-V to 5.5-V Operation D Separate Analog and Digital Supplies D ±0.4 LSB Differential Nonl inearity (DNL), ±1.5 LSB Integral Nonl inearity (INL) D Programmable Settling Time vs Power Consumptio.
Manufacture

Texas Instruments

Datasheet
Download TLV5613 Datasheet




 TLV5613
TLV5613
2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER
WITH POWER DOWN
SLAS174B – DECEMBER 1997 – REVISED NOVEMBER 2000
D 12-Bit Voltage Output DAC
D Single Supply 2.7-V to 5.5-V Operation
D Separate Analog and Digital Supplies
D ±0.4 LSB Differential Nonlinearity (DNL),
±1.5 LSB Integral Nonlinearity (INL)
D Programmable Settling Time vs Power
Consumption:
1 µs/4.2 mW in Fast Mode,
3.5 µs/1.2 mW in Slow Mode
D 8-Bit µController Compatible Interface (8+4
Bit)
D Power-Down Mode (50 nW)
D Rail-to-Rail Output Buffer
D Synchronous or Asynchronous Update
D Monotonic Over Temperature
description
The TLV5613 is a 12-bit voltage output
digital-to-analog converter (DAC) with a 8-bit
microcontroller compatible parallel interface. The
8 LSBs, the 4 MSBs and 3 control bits are written
using three different addresses. Developed for a
wide range of supply voltages, the TLV5613 can
be operated from 2.7 V to 5.5 V.
applications
D Digital Servo Control Loops
D Battery Powered Test Instruments
D Digital Offset and Gain Adjustment
D Industrial Process Control
D Speech Synthesis
D Machine and Motion Control Devices
D Mass Storage Devices
D2
D3
D4
D5
D6
D7
A1
A0
SPD
DVDD
DW OR PW PACKAGE
(TOP VIEW)
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
D1
D0
CS
WE
LDAC
PWD
GND
OUT
REF
AVDD
The resistor string output voltage is buffered by a x2 gain rail-to-rail output buffer. The buffer features a Class A
(slow mode: AB) output stage to improve stability and reduce settling time. The programmable settling time of
the DAC allows the designer to optimize speed versus power dissipation. The settling time can be chosen by
the control bits within the 16-bit data word.
Implemented with a CMOS process, the device is designed for single supply operation from 2.7 V to 5.5 V. It
is available in 20 pin SOIC in standard commercial and industrial temperature ranges.
TA
0°C to 70°C
– 40°C to 85°C
AVAILABLE OPTIONS
PACKAGE
SMALL OUTLINE
(DW)
TLV5613CDW
TLV5613IDW
TSSOP
(PW)
TLV5613CPW
TLV5613IPW
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2000, Texas Instruments Incorporated
1




 TLV5613
TLV5613
2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER
WITH POWER DOWN
SLAS174B DECEMBER 1997 REVISED NOVEMBER 2000
functional block diagram
REF
SPD
PWD
A(0–1)
CS
WE
Power-On
Reset
2
Interface
Control
8
D(0–7)
Powerdown
and Speed
Control
3
2
3-Bit
Control
Latch
4
4-Bit
4
12
DAC MSW
Holding
Latch
8
8-Bit
8
DAC LSW
Holding
Latch
LDAC
12
12-Bit
DAC
Latch
x2
OUT
Terminal Functions
TERMINAL
NAME
NO.
AVDD
11
A0
8
A1
7
CS
18
DVDD
D0 (LSB) D7 (MSB)
10
16, 19, 20
LDAC
16
OUT
13
PWD
15
REF
12
SPD
9
GND
14
WE
17
I/O
DESCRIPTION
Analog positive power supply
I Address input
I Address input
I Chip select. Digital input active low, used to enable/disable inputs
Digital positive power supply
I Data input
I Load DAC. Digital input active low, used to load DAC output
O DAC analog voltage output
I Power down. Digital input active low
I Analog reference voltage input
I Speed select. Digital input
Ground
I Write enable. Digital input active low, used to latch data
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265




 TLV5613
TLV5613
2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER
WITH POWER DOWN
SLAS174B DECEMBER 1997 REVISED NOVEMBER 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (DVDD, AVDD to GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Supply voltage difference, AVDD to DVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.8 V to 2.8 V
Reference input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to AVDD + 0.3 V
Digital input voltage range to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to DVDD + 0.3 V
Operating free-air temperature range, TA: TLV5613C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
TLV5613I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN NOM MAX
Supply voltage, VDD
5-V Supply
3-V Supply
4.5 5
5.5
2.7 3
3.3
Supply voltage difference, VDD = AVDD DVDD
Power on reset, POR
2.8 0
2.8
0.55
2
High-level digital input voltage, VIH
Low-level digital input voltage, VIL
Reference voltage, Vref to REFIN terminal
Load resistance, RL
Load capacitance, CL
Operating free-air temperature, TA
DVDD = 2.7 V to 5.5 V
DVDD = 2.7 V to 5.5 V
5-V Supply (see Note 1)
3-V Supply (see Note 1)
TLV5613C
TLV5613I
2
GND
GND
2
0
40
0.8
2.048 AVDD 1.5
1.024 AVDD 1.5
100
70
85
NOTE 1: Due to the x2 output buffer, a reference input voltage (VDD 0.4)/2 causes clipping of the transfer function.
UNIT
V
V
V
V
V
V
k
pF
°C
°C
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3






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