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Parallel DAC. TLV5619 Datasheet

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Parallel DAC. TLV5619 Datasheet






TLV5619 DAC. Datasheet pdf. Equivalent




TLV5619 DAC. Datasheet pdf. Equivalent





Part

TLV5619

Description

12-Bit Parallel DAC



Feature


TLV5619 www.ti.com SLAS172F – DECEMB ER 1997 – REVISED FEBRUARY 2004 2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-A NALOG CONVERTER WITH POWER DOWN FEATUR ES • Single Supply 2.7-V to 5.5-V Ope ration • ± 0.4 LSB Differential Nonl inearity (DNL), ±1.5 LSB Integral Nonl inearity (INL) • 12-Bit Parallel Inte rface • Compatible With TMS320 DSP Internal Power On Reset • Settli.
Manufacture

Texas Instruments

Datasheet
Download TLV5619 Datasheet


Texas Instruments TLV5619

TLV5619; ng Time 1 µs Typ • Low Power Consumpt ion: – 8 mW for 5-V Supply – 4.3 mW for 3-V Supply • Reference Input Buf fers • Voltage Output • Monotonic O ver Temperature • Asynchronous Update APPLICATIONS • Battery Powered Test Instruments • Digital Offset and Gain Adjustment • Battery Operated/Remote Industrial Controls • Machine and Mo tion Control Devices • Cordless and Wirel.


Texas Instruments TLV5619

ess Telephones • Speech Synthesis • Communication Modulators • Arbitrary Waveform Generation DESCRIPTION The TL V5619 is a 12-bit voltage output DAC wi th a microprocessor and TMS320 compatib le parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using th e LDAC pin. During normal operation, th e device dissipates 8 mW.


Texas Instruments TLV5619

at a 5-V supply and 4.3 mW at a 3-V sup ply. The power consumption can be lower ed to 50 nW by setting the DAC to power -down mode. The output voltage is buffe red by a ×2 gain rail-to-rail amplifie r, which features a Class A output stag e to improve stability and reduce settl ing time. DW OR PW PACKAGE (TOP VIEW) D2 1 D3 2 D4 3 D5 4 D6 5 D7 6 D8 7 D9 8 D1.

Part

TLV5619

Description

12-Bit Parallel DAC



Feature


TLV5619 www.ti.com SLAS172F – DECEMB ER 1997 – REVISED FEBRUARY 2004 2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-A NALOG CONVERTER WITH POWER DOWN FEATUR ES • Single Supply 2.7-V to 5.5-V Ope ration • ± 0.4 LSB Differential Nonl inearity (DNL), ±1.5 LSB Integral Nonl inearity (INL) • 12-Bit Parallel Inte rface • Compatible With TMS320 DSP Internal Power On Reset • Settli.
Manufacture

Texas Instruments

Datasheet
Download TLV5619 Datasheet




 TLV5619
TLV5619
www.ti.com
SLAS172F – DECEMBER 1997 – REVISED FEBRUARY 2004
2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER
WITH POWER DOWN
FEATURES
Single Supply 2.7-V to 5.5-V Operation
• ± 0.4 LSB Differential Nonlinearity (DNL),
±1.5 LSB Integral Nonlinearity (INL)
12-Bit Parallel Interface
Compatible With TMS320 DSP
Internal Power On Reset
Settling Time 1 µs Typ
Low Power Consumption:
– 8 mW for 5-V Supply
– 4.3 mW for 3-V Supply
Reference Input Buffers
Voltage Output
Monotonic Over Temperature
Asynchronous Update
APPLICATIONS
Battery Powered Test Instruments
Digital Offset and Gain Adjustment
Battery Operated/Remote Industrial Controls
Machine and Motion Control Devices
Cordless and Wireless Telephones
Speech Synthesis
Communication Modulators
Arbitrary Waveform Generation
DESCRIPTION
The TLV5619 is a 12-bit voltage output DAC with a
microprocessor and TMS320 compatible parallel
interface. The 12 data bits are double buffered so that
the output can be updated asynchronously using the
LDAC pin. During normal operation, the device dissi-
pates 8 mW at a 5-V supply and 4.3 mW at a 3-V
supply. The power consumption can be lowered to 50
nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail
amplifier, which features a Class A output stage to
improve stability and reduce settling time.
DW OR PW PACKAGE
(TOP VIEW)
D2
1
D3
2
D4
3
D5
4
D6
5
D7
6
D8
7
D9
8
D10
9
D11
10
20
D1
19
D0
18
CS
17
WE
16
LDAC
15
PD
14
GND
13
OUT
12
REFIN
11
VDD
AVAILABLE OPTIONS
TA
0°C to 70°C
40°C to 85°C
40°C to 125°C
PACKAGE
SMALL
OUTLINE (DW)
TLV5619CDW
TLV5619IDW
TLV5619QDW
TSSOP (PW)
TLV5619CPW
TLV5619IPW
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2004, Texas Instruments Incorporated




 TLV5619
TLV5619
SLAS172F – DECEMBER 1997 – REVISED FEBRUARY 2004
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
REFIN 12
D0 19
D1 20
D2 1
D3 2
D4 3
D5 4
D6 5
D7 6
D8 7
D9 8
D10 9
D11 10
18
CS
17
WE
FUNCTIONAL BLOCK DIAGRAM
+
_
12
12-Bit
Input
Register
Resistor
String DAC
12-Bit
DAC
12
Latch
13
x2
OUT
Select
and
Control
Logic
Power-On
Reset
TERMINAL
NAME
NO.
CS
18
D0 (LSB)-D11 (MSB) 19, 20, 1-10
GND
14
LDAC
16
OUT
13
PD
15
REFIN
12
VDD
11
WE
17
15
PD
16
LDAC
Terminal Functions
I/O
DESCRIPTION
I Chip select
I Parallel data input
Ground
I Load DAC
O Analog output
I When low, disables all buffer amplifier voltages to reduce supply current
I Voltage reference input
Positive power supply
I Write enable
2




 TLV5619
TLV5619
www.ti.com
SLAS172F – DECEMBER 1997 – REVISED FEBRUARY 2004
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
Supply voltage (VDD to GND)
Analog input voltage range
Reference input voltage
Digital input voltage range to GND
Operating free-air temperature range, TA
TLV5619C
TLV5619I
TLV5619Q
Storage temperature range, Tstg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
UNIT
7V
- 0.3 V to VDD + 0.3 V
VDD + 0.3 V
- 0.3 V to VDD + 0.3 V
0°C to 70°C
-40°C to 85°C
-40°C to 125°C
-65°C to 150°C
260°C
(1) Stresses beyond those listed under,, absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under,, recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Supply voltage, VDD (5-V Supply)
Supply voltage, VDD (3-V Supply)
High-level digital input voltage, VIH
Low-level digital input voltage, VIL
DVDD = 2.7 V
DVDD = 5.5 V
DVDD = 2.7 V
DVDD = 5.5 V
Reference voltage, Vref to REFIN terminal (5-V Supply)
Reference voltage, Vref to REFIN terminal (3-V Supply)
Load resistance, RL
Load capacitance, CL
TLV5619C
Operating free-air temperature, TA
TLV5619I
TLV5619Q
TLV5619C and TLV5619I
TLV5619Q
MIN NOM
4.5
5
2.7
3
2
2.4
0 2.048
0 1.024
2
10
0
40
40
MAX
5.5
3.3
UNIT
V
V
V
0.6
V
1
0.8
VDD-1.5 V
VDD-1.5 V
k
100 pF
70
85 °C
125
3






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