12-Bit Parallel DAC
TLV5619
www.ti.com
SLAS172F – DECEMBER 1997 – REVISED FEBRUARY 2004
2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG ...
Description
TLV5619
www.ti.com
SLAS172F – DECEMBER 1997 – REVISED FEBRUARY 2004
2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN
FEATURES
Single Supply 2.7-V to 5.5-V Operation ± 0.4 LSB Differential Nonlinearity (DNL),
±1.5 LSB Integral Nonlinearity (INL) 12-Bit Parallel Interface Compatible With TMS320 DSP Internal Power On Reset Settling Time 1 µs Typ Low Power Consumption:
– 8 mW for 5-V Supply
– 4.3 mW for 3-V Supply Reference Input Buffers Voltage Output Monotonic Over Temperature Asynchronous Update
APPLICATIONS
Battery Powered Test Instruments Digital Offset and Gain Adjustment Battery Operated/Remote Industrial Controls Machine and Motion Control Devices Cordless and Wireless Telephones Speech Synthesis Communication Modulators Arbitrary Waveform Generation
DESCRIPTION
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
DW OR PW PACKAGE (TOP VIEW)
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D4
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D5
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D6
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D10
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