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DIGITAL-TO-ANALOG CONVERTERS. TLV5630 Datasheet

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DIGITAL-TO-ANALOG CONVERTERS. TLV5630 Datasheet






TLV5630 CONVERTERS. Datasheet pdf. Equivalent




TLV5630 CONVERTERS. Datasheet pdf. Equivalent





Part

TLV5630

Description

LOW POWER DIGITAL-TO-ANALOG CONVERTERS



Feature


TLV5630 TLV5631 TLV5632 www.ti.com ..... ....................................... ....................................... ....................................... .......................... SLAS269F – MAY 2000 – REVISED NOVEMBER 2008 8-C HANNEL, 12-/10-/8-BIT, 2.7-V TO 5.5-V L OW POWER DIGITAL-TO-ANALOG CONVERTERS W ITH POWER DOWN AND INTERNAL REFERENCE FEATURES 1 • Eight Vol.
Manufacture

Texas Instruments

Datasheet
Download TLV5630 Datasheet


Texas Instruments TLV5630

TLV5630; tage Output DACs in One Package – TLV5 630 . . . 12-Bit – TLV5631 . . . 10-B it – TLV5632 . . . 8-Bit – 1 µs in Fast Mode – 3 µs in Slow Mode • P rogrammable Settling Time vs Power Cons umption – 1 µs in Fast Mode – 3 µ s in Slow Mode – 18 mW in Slow Mode a t 3 V – 48 mW in Fast Mode at 3 V • Compatible With TMS320 and SPI Serial Ports • Monotonic Over Temperature • Low Pow.


Texas Instruments TLV5630

er Consumption: – 18 mW in Slow Mode a t 3 V – 48 mW in Fast Mode at 3 V • Power-Down Mode • Internal Reference • Data Output for Daisy-Chaining AP PLICATIONS • Digital Servo Control Lo ops • Digital Offset and Gain Adjustm ent • Industrial Process Control • Machine and Motion Control Devices • Mass Storage Devices DW OR PW PACKAGE ( TOP VIEW) DGND 1 DIN 2 SCLK 3 F.


Texas Instruments TLV5630

S 4 PRE 5 OUTE 6 OUTF 7 OUTG 8 OUTH 9 AGND 10 20 DVDD 19 DOUT 18 LDAC 17 MODE 16 REF 15 OUTD 14 OUTC 13 OUTB 12 OUTA 11 AVDD DESCRIPTION The TLV5630, TLV5631, and TLV5632 are pin-compatible, eight-chan nel, 12-/10-/8-bit voltage output DACs each with a flexible serial interface. The serial interface allows glueless in terface to TMS320 .

Part

TLV5630

Description

LOW POWER DIGITAL-TO-ANALOG CONVERTERS



Feature


TLV5630 TLV5631 TLV5632 www.ti.com ..... ....................................... ....................................... ....................................... .......................... SLAS269F – MAY 2000 – REVISED NOVEMBER 2008 8-C HANNEL, 12-/10-/8-BIT, 2.7-V TO 5.5-V L OW POWER DIGITAL-TO-ANALOG CONVERTERS W ITH POWER DOWN AND INTERNAL REFERENCE FEATURES 1 • Eight Vol.
Manufacture

Texas Instruments

Datasheet
Download TLV5630 Datasheet




 TLV5630
TLV5630
TLV5631
TLV5632
www.ti.com .................................................................................................................................................... SLAS269F – MAY 2000 – REVISED NOVEMBER 2008
8-CHANNEL, 12-/10-/8-BIT, 2.7-V TO 5.5-V LOW POWER DIGITAL-TO-ANALOG
CONVERTERS WITH POWER DOWN AND INTERNAL REFERENCE
FEATURES
1
Eight Voltage Output DACs in One Package
– TLV5630 . . . 12-Bit
– TLV5631 . . . 10-Bit
– TLV5632 . . . 8-Bit
– 1 µs in Fast Mode
– 3 µs in Slow Mode
Programmable Settling Time vs Power
Consumption
– 1 µs in Fast Mode
– 3 µs in Slow Mode
– 18 mW in Slow Mode at 3 V
– 48 mW in Fast Mode at 3 V
Compatible With TMS320 and SPI Serial Ports
Monotonic Over Temperature
Low Power Consumption:
– 18 mW in Slow Mode at 3 V
– 48 mW in Fast Mode at 3 V
Power-Down Mode
Internal Reference
Data Output for Daisy-Chaining
APPLICATIONS
Digital Servo Control Loops
Digital Offset and Gain Adjustment
Industrial Process Control
Machine and Motion Control Devices
Mass Storage Devices
DW OR PW PACKAGE
(TOP VIEW)
DGND
1
DIN
2
SCLK
3
FS
4
PRE
5
OUTE
6
OUTF
7
OUTG
8
OUTH
9
AGND
10
20
DVDD
19
DOUT
18
LDAC
17
MODE
16
REF
15
OUTD
14
OUTC
13
OUTB
12
OUTA
11
AVDD
DESCRIPTION
The TLV5630, TLV5631, and TLV5632 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs
each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and
Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.
Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs,
and a data output which can be used to cascade multiple devices, and an internal programmable band-gap
reference.
The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to
allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be
connected to the supply voltage.
Implemented with a CMOS process, the DACs are designed for single-supply operation from 2.7 V to 5.5 V, and
can operate on two separate analog and digital power supplies. The devices are available in 20-pin SOIC and
TSSOP packages.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2008, Texas Instruments Incorporated




 TLV5630
TLV5630
TLV5631
TLV5632
SLAS269F – MAY 2000 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
TA
40°C to 85°C
AVAILABLE OPTIONS
SOIC (DW)
TLV5630IDW
TLV5631IDW
TLV5632IDW
PACKAGE
TSSOP (PW)
TLV5630IPW
TLV5631IPW
TLV5632IPW
FUNCTIONAL BLOCK DIAGRAM
RESOLUTION
12
10
8
REF
Band-Gap
Voltage
1 V or 2 V
(Trimmed)
with Enable 2
SCLK
DIN
DOUT
FS
MODE
PRE
Serial
12
Interface
8
LDAC
12/10/8
12/10/8
12/10/8
X2
DAC A
Holding
Latch
DAC A
Latch
DAC B, C, D, E, F, G and H
Same as DAC A
OUTA
OUT
B, C, D,
E, F, G
and H
TERMINAL
NAME
NO.
AGND
10
AVDD
11
DGND
1
DIN
2
DOUT
19
DVDD
20
FS
4
LDAC
18
MODE
17
PRE
5
REF
16
SCLK
3
OUTA-OUTH 12-15, 6-9
Terminal Functions
I/O
DESCRIPTION
P Analog ground
P Analog power supply
P Digital ground
I Digital serial data input
O Digital serial data output
P Digital power supply
I Frame sync input
I Load DAC. The DAC outputs are only updated, if this signal is low. It is an asynchronous input.
I DSP/µC mode pin. High = µC mode, NC = DSP mode.
I Preset input
I/O Voltage reference input/output
I Serial clock input
O DAC outputs A, B, C, D, E, F, G and H
2
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Copyright © 2000–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV5630 TLV5631 TLV5632




 TLV5630
TLV5630
TLV5631
TLV5632
www.ti.com .................................................................................................................................................... SLAS269F – MAY 2000 – REVISED NOVEMBER 2008
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature (unless otherwise noted) (1)
Supply voltage, (AVDD, DVDD to GND)
Reference input voltage range
Digital input voltage range
Operating free-air temperature range, TA
Storage temperature range, Tstg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
UNIT
7V
- 0.3 V to AVDD + 0.3
- 0.3 V to DVDD + 0.3
-40°C to 85°C
-65°C to 150°C
260°C
(1) Stresses beyond those listed under„ absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under„ recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Supply voltage, AVDD, DVDD
5-V operation
3-V operation
High-level digital input, VIH
Low-level digital input, VIL
Reference voltage, Vref
Analog output load resistance, RL
Analog output load capacitance, CL
Clock frequency, fCLK
Operating free-air temperature, TA
DVDD = 2.7 V
DVDD = 5.5 V
DVDD = 2.7 V
DVDD = 5.5 V
AVDD = 5 V, See (1)
AVDD = 3 V, See (1)
(1) Reference input voltages greater than AVDD/2 causes saturation for large DAC codes.
MIN
4.5
2.7
2
2.4
GND
GND
2
-40
TYP
5
3
2.048
1.024
MAX
5.5
3.3
0.6
1.0
AVDD
AVDD
100
30
85
UNIT
V
V
V
V
V
k
pF
MHz
°C
ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
POWER SUPPLY
IDD
POR
PSRR
Power supply current
Power-down supply
current
Power on threshold
Power supply rejection
ratio
TEST CONDITIONS
No load, All inputs = DVDD or GND,
Vref = 2.048 V, See (1)
Fast
Slow
Full scale, See (2)
MIN TYP
16
6
0.1
2
-50
MAX UNIT
21
mA
8
µA
V
dB
(1) IDD is measured while continuously writing code 2048 to the DAC. For VIH < DVDD - 0.7 V and VIL > 0.7 V, supply current increases.
(2) Power supply rejection ratio at full scale is measured by varying AVDD and is given by: PSRR = 20 log [(EG(AVDDmax) -
EG(AVDDmin))/VDDmax]
Copyright © 2000–2008, Texas Instruments Incorporated
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3
Product Folder Link(s): TLV5630 TLV5631 TLV5632






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