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12-Bit DAC. TLV5636 Datasheet

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12-Bit DAC. TLV5636 Datasheet






TLV5636 DAC. Datasheet pdf. Equivalent




TLV5636 DAC. Datasheet pdf. Equivalent





Part

TLV5636

Description

Low Power 12-Bit DAC



Feature


www.ti.com D−8 DGK−8 TLV5636 SLAS 223C – JUNE 1999 – REVISED APRIL 20 04 2.7-V TO 5.5-V, LOW POWER, 12-BIT, DIGITAL-TO-ANALOG CONVERTER WITH INTERN AL REFERENCE AND POWER DOWN FEATURES 12-Bit Voltage Output DAC • Progra mmable Internal Reference • Programma ble Settling Time: – 1 µs in Fast Mo de – 3.5 µs in Slow Mode • Compati ble With TMS320 and SPI™ Serial Ports • .
Manufacture

Texas Instruments

Datasheet
Download TLV5636 Datasheet


Texas Instruments TLV5636

TLV5636; Differential Nonlinearity . . . <0.5 LSB Typ • Monotonic Over Temperature AP PLICATIONS • Digital Servo Control Lo ops • Digital Offset and Gain Adjustm ent • Industrial Process Control • Machine and Motion Control Devices • Mass Storage Devices D OR DGK PACKAGE ( TOP VIEW) DIN 1 SCLK 2 CS 3 FS 4 8 VD D 7 OUT 6 REF 5 AGND DESCRIPTION The T LV5636 is a 12-bit voltage out.


Texas Instruments TLV5636

put DAC with a flexible 4-wire serial in terface. The serial interface allows gl ueless interface to TMS320 and SPI™, QSPI™, and Microwire™ serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits. The resistor string output volta ge is buffered by a x2 gain rail-to-rai l output buffer. The programmable settl ing time of the DAC allo.


Texas Instruments TLV5636

ws the designer to optimize speed vs pow er dissipation. With its on-chip progra mmable precision voltage reference, the TLV5636 simplifies overall system desi gn. Because of its ability to source up to 1 mA, the reference can also be use d as a system reference. Implemented wi th a CMOS process, the device is design ed for single supply operation from 2.7 V to 5.5 V. It is.

Part

TLV5636

Description

Low Power 12-Bit DAC



Feature


www.ti.com D−8 DGK−8 TLV5636 SLAS 223C – JUNE 1999 – REVISED APRIL 20 04 2.7-V TO 5.5-V, LOW POWER, 12-BIT, DIGITAL-TO-ANALOG CONVERTER WITH INTERN AL REFERENCE AND POWER DOWN FEATURES 12-Bit Voltage Output DAC • Progra mmable Internal Reference • Programma ble Settling Time: – 1 µs in Fast Mo de – 3.5 µs in Slow Mode • Compati ble With TMS320 and SPI™ Serial Ports • .
Manufacture

Texas Instruments

Datasheet
Download TLV5636 Datasheet




 TLV5636
www.ti.com
D−8
DGK−8
TLV5636
SLAS223C – JUNE 1999 – REVISED APRIL 2004
2.7-V TO 5.5-V, LOW POWER, 12-BIT, DIGITAL-TO-ANALOG CONVERTER
WITH INTERNAL REFERENCE AND POWER DOWN
FEATURES
12-Bit Voltage Output DAC
Programmable Internal Reference
Programmable Settling Time:
– 1 µs in Fast Mode
– 3.5 µs in Slow Mode
Compatible With TMS320 and SPI™ Serial
Ports
Differential Nonlinearity . . . <0.5 LSB Typ
Monotonic Over Temperature
APPLICATIONS
Digital Servo Control Loops
Digital Offset and Gain Adjustment
Industrial Process Control
Machine and Motion Control Devices
Mass Storage Devices
D OR DGK PACKAGE
(TOP VIEW)
DIN 1
SCLK 2
CS 3
FS 4
8 VDD
7 OUT
6 REF
5 AGND
DESCRIPTION
The TLV5636 is a 12-bit voltage output DAC with a flexible 4-wire serial interface. The serial interface allows
glueless interface to TMS320 and SPI™, QSPI™, and Microwire™ serial ports. It is programmed with a 16-bit
serial string containing 4 control and 12 data bits.
The resistor string output voltage is buffered by a x2 gain rail-to-rail output buffer. The programmable settling
time of the DAC allows the designer to optimize speed vs power dissipation. With its on-chip programmable
precision voltage reference, the TLV5636 simplifies overall system design.
Because of its ability to source up to 1 mA, the reference can also be used as a system reference. Implemented
with a CMOS process, the device is designed for single supply operation from 2.7 V to 5.5 V. It is available in an
8-pin SOIC and 8-pin MSOP package to reduce board space in standard commercial and industrial temperature
ranges
AVAILABLE OPTIONS
TA
0°C to 70°C
-40°C to 85°C
PACKAGE
SOIC (D)
MSOP (DGK)
TLV5636CD
TLV5636CDGK
TLV5636ID
TLV5636IDGK
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SPI, QSPI are trademarks of Motorola, Inc..
Microwire is a trademark of National Semiconductor Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2004, Texas Instruments Incorporated




 TLV5636
TLV5636
SLAS223C – JUNE 1999 – REVISED APRIL 2004
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
REF
PGA With
Output Enable
Voltage
Bandgap
Power-On
Reset
DIN
SCLK
CS
FS
Serial
Interface
and
Control
Power
and Speed
Control
2
2
2-Bit
Control
Latch
12
12
12-Bit
DAC
Latch
x2
OUT
NAME
AGND
CS
DIN
FS
OUT
REF
SCLK
VDD
TERMINAL
NO.
5
3
1
4
7
6
2
8
Terminal Functions
I/O/P
DESCRIPTION
P Ground
I Chip select. Digital input active low, used to enable/disable inputs
I Digital serial data input
I Frame sync input
O DAC A analog voltage output
I/O Analog reference voltage input/output
I Digital serial clock input
P Positive power supply
2




 TLV5636
www.ti.com
TLV5636
SLAS223C – JUNE 1999 – REVISED APRIL 2004
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
Supply voltage (VDD to AGND)
Reference input voltage
Digital input voltage range
Operating free-air temperature range, TA
TLV5636C
TLV5636I
Storage temperature range, Tstg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
UNIT
7V
- 0.3 V to VDD + 0.3 V
- 0.3 V to VDD + 0.3 V
0°C to 70°C
-40°C to 85°C
-65°C to 150°C
260°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Supply voltage, VDD
Power on Reset, POR
High-level digital input voltage, VIH
Low-level digital input voltage, VIL
Reference voltage, Vref to REF terminal
Load resistance, RL
Load capacitance, CL
Clock frequency, fCLK
Operating free-air temperature, TA
VDD = 5 V
VDD = 3 V
DVDD = 2.7 V
DVDD = 5.5 V
DVDD = 2.7 V
DVDD = 5.5 V
VDD = 5 V (1)
VDD = 3 V(1)
TLV5636C
TLV5636I
MIN
NOM
4.5
5
2.7
3
0.55
2
2.4
AGND
AGND
2
2.048
1.024
0
-40
MAX
5.5
3.3
2
0.6
1
VDD - 1.5
VDD - 1.5
100
20
70
85
UNIT
V
V
V
V
V
V
V
k
pF
MHz
°C
(1) Due to the x2 output buffer, a reference input voltage . (VDD - 0.4 V)/2 causes clipping of the transfer function. The output buffer of the
internal reference must be disabled, if an external reference is used.
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range, supply voltages, and reference voltages (unless otherwise noted)
POWER SUPPLY
PARAMETER
IDD
PSRR
Power supply current
Power-down supply current
Power supply rejection ratio
TEST CONDITIONS
No load,
All inputs = AGND or VDD,
DAC latch = 0x800
Fast
Slow
See Figure 8
Zero scale (1)
Full Scale(2)
MIN TYP MAX
2.3 3.3
1.5 1.9
0.01 10
-65
-65
UNIT
mA
µA
dB
(1) Power supply rejection ratio at zero scale is measured by varying VDD and is given by:
PSRR = 20 log [(EZS(VDDmax) - EZS(VDDmin))/VDDmax]
(2) Power supply rejection ratio at full scale is measured by varying VDD and is given by:
PSRR = 20 log [(EG(VDDmax) - EG(VDDmin))/VDDmax]
3






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