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POWER AMPLIFIER. TPA3124D2 Datasheet

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POWER AMPLIFIER. TPA3124D2 Datasheet







TPA3124D2 AMPLIFIER. Datasheet pdf. Equivalent




TPA3124D2 AMPLIFIER. Datasheet pdf. Equivalent





Part

TPA3124D2

Description

15-W STEREO CLASS-D AUDIO POWER AMPLIFIER

Manufacture

Texas Instruments

Datasheet
Download TPA3124D2 Datasheet


Texas Instruments TPA3124D2

TPA3124D2; TPA3124D2 www.ti.com................... ....................................... ....................................... ....................................... ....................................... ......................... SLOS578 – M AY 2008 15-W STEREO CLASS-D AUDIO POWER AMPLIFIER FEATURES 1 •234 10-W/Ch I nto an 8-Ω Load From a 24-V Supply 15-W/Ch into a 4-Ω Load .


Texas Instruments TPA3124D2

from a 22-V Supply • 30-W/Ch into a 8- Ω Load from a 22-V Supply • Operate s From 10 V to 26 V • Can Run From +2 4 V LCD Backlight Supply • Efficient Class-D Operation Eliminates Need for H eat Sinks • Four Selectable, Fixed-Ga in Settings • Internal Oscillator (No External Components Required) • Sing le-Ended Analog Inputs • Thermal and Short-Circuit Protection With Auto R.


Texas Instruments TPA3124D2

ecovery • Space-Saving Surface Mount 2 4-Pin TSSOP Package • Advanced Power- Off Pop Reduction APPLICATIONS • Fla t Panel Televisions • DLP® TVs • C RT TVs • Powered Speakers DESCRIPTION The TPA3124D2 is a 15-W (per channel), efficient, class-D audio power amplifi er for driving stereo speakers in a sin gle-ended configuration; or, a mono spe aker in a bridge-tied-load conf.



Part

TPA3124D2

Description

15-W STEREO CLASS-D AUDIO POWER AMPLIFIER

Manufacture

Texas Instruments

Datasheet
Download TPA3124D2 Datasheet




 TPA3124D2
TPA3124D2
www.ti.com........................................................................................................................................................................................................ SLOS578 – MAY 2008
15-W STEREO CLASS-D AUDIO POWER AMPLIFIER
FEATURES
1
234 10-W/Ch Into an 8-Load From a 24-V Supply
15-W/Ch into a 4-Load from a 22-V Supply
30-W/Ch into a 8-Load from a 22-V Supply
Operates From 10 V to 26 V
Can Run From +24 V LCD Backlight Supply
Efficient Class-D Operation Eliminates Need
for Heat Sinks
Four Selectable, Fixed-Gain Settings
Internal Oscillator (No External Components
Required)
Single-Ended Analog Inputs
Thermal and Short-Circuit Protection With
Auto Recovery
Space-Saving Surface Mount 24-Pin TSSOP
Package
Advanced Power-Off Pop Reduction
APPLICATIONS
Flat Panel Televisions
DLP® TVs
CRT TVs
Powered Speakers
DESCRIPTION
The TPA3124D2 is a 15-W (per channel), efficient,
class-D audio power amplifier for driving stereo
speakers in a single-ended configuration; or, a mono
speaker in a bridge-tied-load configuration. The
TPA3124D2 can drive stereo speakers as low as 4 .
The efficiency of the TPA3124D2 eliminates the need
for an external heat sink when playing music.
The gain of the amplifier is controlled by two gain
select pins. The gain selections are 20, 26, 32, and
36 dB.
The patented start-up and shutdown sequences
minimize pop noise in the speakers without additional
circuitry.
SIMPLIFIED APPLICATION CIRCUIT
Left Channel
Right Channel
1 mF
1 mF
1 mF
TPA3124D2
0.22 mF
LIN
BSR
33 mH
RIN
ROUT
PGNDR
0.22 mF
BYPASS
AGND
PGNDL
LOUT
BSL
0.22 mF
33 mH
0.22 mF
470 mF
470 mF
10 V to 26 V
AVCC
PVCCL
PVCCR
10 V to 26 V
Shutdown Control
Mute Control
SD
MUTE
VCLAMP
1 mF
GAIN0
GAIN1
4-Step Gain Control
S0267-02
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DLP is a registered trademark of Texas Instruments.
2
System Two, Audio Precision are trademarks of Audio Precision, Inc.
3
All other trademarks are the property of their respective owners.
4
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated





 TPA3124D2
TPA3124D2
SLOS578 – MAY 2008........................................................................................................................................................................................................ www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
PWP (TSSOP) PACKAGE
(TOP VIEW)
PVCCL
1
24
SD
2
23
PVCCL
3
22
MUTE
4
21
LIN
5
20
RIN
6
19
BYPASS
7
18
AGND
8
17
AGND
9
16
PVCCR
10
15
VCLAMP
11
14
PVCCR
12
13
PGNDL
PGNDL
LOUT
BSL
AVCC
AVCC
GAIN0
GAIN1
BSR
ROUT
PGNDR
PGNDR
TERMINAL
NAME
24-PIN
(PWP)
SD
2
RIN
6
LIN
5
GAIN0
18
GAIN1
17
MUTE
4
BSL
PVCCL
LOUT
PGNDL
VCLAMP
BSR
ROUT
PGNDR
PVCCR
AGND
AGND
21
1, 3
22
23, 24
11
16
15
13, 14
10, 12
9
8
BYPASS
7
AVCC
19, 20
Thermal pad
Die pad
Table 1. TERMINAL FUNCTIONS
I/O/P
DESCRIPTION
I
Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to
AVCC
I Audio input for right channel
I Audio input for left channel
I Gain select least-significant bit. TTL logic levels with compliance to AVCC
I Gain select most-significant bit. TTL logic levels with compliance to AVCC
I
Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =
outputs enabled). TTL logic levels with compliance to AVCC
I/O Bootstrap I/O for left channel
P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC
O Class-D -H-bridge positive output for left channel
P Power ground for left-channel H-bridge
P Internally generated voltage supply for bootstrap capacitors
I/O Bootstrap I/O for right channel
O Class-D -H-bridge negative output for right channel
P Power ground for right-channel H-bridge.
P Power supply for right-channel H-bridge, not connected to PVCCL or AVCC
P Analog ground for digital/analog cells in core
P Analog ground for analog cells in core
O
Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via
external capacitor sizing.
P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL
P
Connect to ground. Thermal pad should be soldered down on all applications to secure the
device properly to the printed wiring board.
2
Submit Documentation Feedback
Product Folder Link(s): TPA3124D2
Copyright © 2008, Texas Instruments Incorporated





 TPA3124D2
TPA3124D2
www.ti.com........................................................................................................................................................................................................ SLOS578 – MAY 2008
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
VCC
VI
VIN
TA
TJ
Tstg
RL
ESD
Supply voltage
Logic input voltage
Analog input voltage
Continuous total power dissipation
Operating free-air temperature range
Operating junction temperature range
Storage temperature range
Load resistance (minimum value)
Electrostatic Discharge
AVCC, PVCC
SD, MUTE, GAIN0, GAIN1
RIN, LIN
SE Output Configuration
BTL Output Configuration
Human body model (all pins)
Charged-device model (all
pins)
VALUE
–0.3 to 30
–0.3 to VCC + 0.3
–0.3 to 7
See Dissipation Rating Table
–40 to 85
–40 to 150
–65 to 150
3.2
6.4
±2
UNIT
V
V
V
°C
°C
°C
kV
±500
V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATINGS
PACKAGE (1) (2)
24-pin TSSOP
TA 25°C
4.16 W
DERATING FACTOR
33.3 mW/°C
TA = 70°C
2.67 W
TA = 85°C
2.16 W
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) This data was taken using 1 oz trace and copper pad that is soldered directly to a JEDEC standard high-k PCB. The thermal pad must
be soldered to a thermal land on the printed-circuit board. See the PowerPAD Thermally Enhanced Package application note
(SLMA002).
RECOMMENDED OPERATING CONDITIONS
VCC
Supply voltage
PVCC, AVCC
VIH
High-level input voltage
SD, MUTE, GAIN0, GAIN1
VIL
Low-level input voltage
SD, MUTE, GAIN0, GAIN1
SD, VI = VCC, VCC = 30 V
IIH
High-level input current
MUTE, VI = VCC, VCC = 30 V
GAIN0, GAIN1, VI = VCC, VCC = 24 V
SD, VI = 0, VCC = 30 V
IIL
Low-level input current
MUTE, VI = 0 V, VCC = 30 V
GAIN0, GAIN1, VI = 0 V, VCC = 24 V
TA
Operating free-air temperature
MIN
MAX
UNIT
10
26
V
2
V
0.8
V
125
125
µA
125
1
1
µA
1
–40
85
°C
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPA3124D2
Submit Documentation Feedback
3



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