Document
Data sheet acquired from Harris Semiconductor SCHS170B
November 1997 - Revised October 2003
CD74HC253, CD74HCT253
High-Speed CMOS Logic Dual 4-Input Multiplexer
[ /Title (CD74 HC253 , CD74 HCT25 3) /Subject (High Speed CMOS Logic Dual 4-Input Multiplexer)
Features
Description
• Common Select Inputs
• Separate Output-Enable Inputs
• Three-State Outputs
• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
The CD74HC253 and CD74HCT253 are dual 4-to-1 line selector/multiplexers having three-state outputs. One of four sources for each section is selected by the common select inputs, S0 and S1. When the output enable (1OE, 2OE) is HIGH, the output is in the high-impedance state.
Ordering Information
PART NUMBER
TEMP. RANGE (oC) PACKAGE
CD74HC253E
-55 to 125
16 Ld PDIP
CD74HC253M
-55 to 125
16 Ld SOIC
CD74HC253MT
-55 to 125
16 Ld SOIC
CD74HC253M96
-55 to 125
16 Ld SOIC
CD74HCT253E
-55 to 125
16 Ld PDIP
CD74HCT253M
-55 to 125
16 Ld SOIC
CD74HCT253MT
-55 to 125
16 Ld SOIC
CD74HCT253M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250.
Pinout
CD74HC253, CD74HCT253 (PDIP, SOIC) TOP VIEW
1OE 1 S1 2 1I3 3 1I2 4 1I1 5 1I0 6 1Y 7
GND 8
16 VCC 15 2OE 14 S0 13 2I3 12 2I2 11 2I1 10 2I0 9 2Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
1
Copyright © 2003, Texas Instruments Incorporated
1
CD74HC253, CD74HCT253
Functional Diagrams
2OE
2I3
2I2
2I1
2I0
S0
S1
15
13
12
11
10
14
2
1I0 6
1I1 5
1I2 4
1I3 3
1OE 1
2OE 2OE
16 VCC
8 GND
P
N
2OE
2OE 9 2Y
1OE 1OE
N
P
1OE
1OE 7 1Y
TRUTH TABLE
SELECT INPUTS (Note 1)
DATA INPUTS
OUTPUT ENABLE OUTPUT
S1
S0
I0
I1
I2
I3
OE
Y
X
X
X
X
X
X
H
Z
L
L
L
X
X
X
L
L
L
L
H
X
X
X
L
H
L
H
X
L
X
X
L
L
L
H
X
H
X
X
L
H
H
L
X
X
L
X
L
L
H
L
X
X
H
X
L
H
H
H
X
X
X
L
L
L
H
H
X
X
X
H
L
H
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, Z = High Impedance (Off). NOTE:
1. Select inputs S1 and S0 are common to both sections.
2
CD74HC253, CD74HCT253
Absolute Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA DC Drain Current, per Output, IO
For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±35mA DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA
Thermal Information
Thermal Resistance (Typical, Note 2)
θJA (oC/W)
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . .
67
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . .
73
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time 2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max) 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specificati.