SN74AHCT139

SN54AHCT139, SN74AHCT139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed Memory Decoders and Data-Transmission Systems D Incorporate Two Enable Inputs to Simplify Cascading and/or Data Reception D Latch-Up Performance Exceeds 250 mA Per JESD 17 D ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) description/ordering information The ’AHCT139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 4.5-V to 5.5-V VCC operation. These devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. SCLS267M – DECEMBER 1995 – REVISED MARCH 2003 SN54AHCT139 . . . J OR W PACKAGE SN74AHCT139 . . . D, DB, DGV, N, NS, OR PW PACKAGE (TOP VIEW) 1G 1 1A 2 1B 3 1Y0 4 1Y1 5 1Y2 6 1Y3 7 GND 8 16 VCC 15 2G 14 2A 13 2B 12 2Y0 11 2Y1 10 2Y2 9 2Y3 SN54AHCT139 . . . FK PACKAGE (TOP VIEW) 2G VCC NC 1G 1A 1B 3 2 1 20 19 4 18 2A 1Y0 5 17 2B NC 6 16 NC 1...