HD74LS393P

HD74LS393 Dual 4-bit Binary Counters REJ03D0486–0200 Rev.2.00 Feb.18.2005 This circuit contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters. The HD74LS393 comprises two independent four-bit binary counters each having a clear and a clock input. N-bit binary counter can be implemented with each package providing the capability of divide-by-258. Features Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS393P DILP-14 pin PRDP0014AB-B (DP-14AV) P HD74LS393FPEL SOP-14 pin (JEITA) PRSP0014DF-B FP (FP-14DAV) HD74LS393RPEL SOP-14 pin (JEDEC) PRSP0014DE-A (FP-14DNV) RP Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity) — EL (2,000 pcs/reel) EL (2,500 pcs/reel) Pin Arrangement 1A 1 1Clear 2 1QA 3 1QB 4 Outputs 1QC 5 1QD 6 GND 7 CLR QA A QB QC QD CLR QA A QB QC QD 14 VCC 13 2A 12 2Clear 11 2QA 10 2QB 9 2QC Outputs 8 2QD (Top view) Rev.2.00, Feb.18.2005, page 1 of 6 HD74LS393 Function Table Count QD 0 L 1 L 2 L 3 L 4 L 5 L 6 L 7 L 8 H 9 H 10 H 11 H 12 H 13 H 14 H 15 H H; high level, L; low level Block Diagram (1/2) Input A Clear Input Output QC QB QA L L L L L H L H L L H H H L L H L H H H L H H H L L L L L H L H L L H H H L L H L H H H L H H H QA T Clear QB T Clear QC T Clear QD T Clear QA QB Outputs QC ...