Dual J-K Flip-Flops
HD74LS76A
Dual J-K Flip-Flops (with Preset and Clear)
Features
• Ordering Information
Part Name
Package Type
Package...
Description
HD74LS76A
Dual J-K Flip-Flops (with Preset and Clear)
Features
Ordering Information
Part Name
Package Type
Package Code Package (Previous Code) Abbreviation
HD74LS76AP
DILP-16 pin
PRDP0016AE-B (DP-16FV)
P
HD74LS76ARPEL SOP-16 pin(JEDEC)
PRSP0016DG-A
(FP-16DNV)
RP
Note: Please consult the sales office for the above package availability.
Pin Arrangement
REJ03D0417–0300 Rev.3.00
Jul.22.2005
Taping Abbreviation (Quantity) — EL(2,500 pcs/reel)
1CK 1 1PR 2 1CLR 3
1J 4 VCC 5 2CK 6 2PR 7 2CLR 8
J CK K PR CLR
Q
Q
K CK J
CLR PR
Q
Q
16 1K 15 1Q 14 1Q 13 GND 12 2K 11 2Q 10 2Q 9 2J
(Top view)
Rev.3.00, Jul.22.2005, page 1 of 6
HD74LS76A
Function Table
Inputs
Outputs
Preset
Clear
Clock
J
K
Q
Q
L
H
X
X
X
H
L
H
L
X
X
X
L
H
L
L
X
X
X
H*
H*
H
H
↓
L
L
Q0
Q0
H
H
↓
H
L
H
L
H
H
↓
L
H
L
H
H
H
↓
H
H
Toggle
H
H
H
X
X
Q0
Q0
H; high level, L; low level, X; irrelevant, ↓; transition from high to low level,
Q0; level of Q before the indicated steady-state input conditions were established.
Q0; complement of Q0 or level of Q before the indicated steady-state input conditions were established.
Toggle; each output changes to the complement of its previous level on each active transition indicated by ↓.
* This configuration is nonstable; that is, it will not persist when preset and clear inputs return to their inactive (high) level.
Block Diagram (1/2)
Q
Preset K
Clock
Q
Clear J
Absolute Maximum Ratings
I...
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