Si5394

Si5395/94/92 Data Sheet 12-Channel, Any-Frequency, Any-Output Jitter Attenuator/Clock Multiplier with Ultra-Low Jitter The Si5395/94/92 Jitter attenuators combine fourth-generation DSPLL™ and MultiSynth™ technologies to deliver ultra-low jitter (69 fs) for high performance applications like 56G SerDes. They are used in applications that demand the highest level of integration and jitter performance. All PLL components are integrated on-chip, eliminating the risk of noise coupling associated with discrete solutions. Device grades J/K/L/M/E have an integrated reference to save board space, improve system reliability and reduces the effect of acoustic emissions noise caused by temperature ramps. Grades A/B/C/D/P use an external crystal (XTAL) or crystal oscillator (XO) reference. The Si5395/94/92 support free-run, synchronous and holdover modes as well as enhanced hitless switching, minimizing the phase transients associated when switching between input clocks. These devices are programmable via a serial interface with in-circuit programmable non-volatile memory (NVM) so they always power up with a known frequency configuration. Programming the Si5395/94/92 is easy with Silicon Labs’ ClockBuilderTM Pro software. Factory preprogrammed devices are also available. For more information, visit the https://www.silabs.com/contact-sales page. Applications: 56G/112G PAM4 SerDes clocking OTN muxponders and transponders 10/40/100/200/400G networking line cards 10/40/100/400 GbE Sy...