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Operational Amplifier. LMC6034 Datasheet

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Operational Amplifier. LMC6034 Datasheet






LMC6034 Amplifier. Datasheet pdf. Equivalent




LMC6034 Amplifier. Datasheet pdf. Equivalent





Part

LMC6034

Description

CMOS Quad Operational Amplifier



Feature


LMC6034 www.ti.com SNOS608C – MAY 19 98 – REVISED MARCH 2013 LMC6034 CMOS Quad Operational Amplifier Check for S amples: LMC6034 FEATURES 1 •2 Specif ied for 2 kΩ and 600Ω Loads • High Voltage Gain: 126 dB • Low Offset Vol tage Drift: 2.3 μV/°C • Ultra Low I nput Bias Current: 40 fA • Input Comm on-Mode Range Includes V− • Operati ng Range from +5V to +15V Supply • ISS =.
Manufacture

Texas Instruments

Datasheet
Download LMC6034 Datasheet


Texas Instruments LMC6034

LMC6034; 400 μA/Amplifier; Independent of V+ Low Distortion: 0.01% at 10 kHz • S lew Rate: 1.1 V/μs • Improved Perfor mance Over TLC274 DESCRIPTION The LMC6 034 is a CMOS quad operational amplifie r which can operate from either a singl e supply or dual supplies. Its performa nce features include an input common-mo de range that reaches ground, low input bias current, and high vo.


Texas Instruments LMC6034

ltage gain into realistic loads, such as 2 kΩ and 600Ω. This chip is built wi th National's advanced DoublePoly Silic on-Gate CMOS process. See the LMC6032 d atasheet for a CMOS dual operational am plifier with these same features. For h igher performance characteristics refer to the LMC660. APPLICATIONS • High- Impedance Buffer or Preamplifier • Cu rrent-to-Voltage Convert.


Texas Instruments LMC6034

er • Long-Term Integrator • Sample-a nd-Hold Circuit • Medical Instrumenta tion Connection Diagram Figure 1. 14- Pin SOIC (Top View) Guard Ring Connecti ons – Non-Inverting Amplifier 1 Plea se be aware that an important notice co ncerning availability, standard warrant y, and use in critical applications of Texas Instruments semiconductor product s and disclaimers thereto .

Part

LMC6034

Description

CMOS Quad Operational Amplifier



Feature


LMC6034 www.ti.com SNOS608C – MAY 19 98 – REVISED MARCH 2013 LMC6034 CMOS Quad Operational Amplifier Check for S amples: LMC6034 FEATURES 1 •2 Specif ied for 2 kΩ and 600Ω Loads • High Voltage Gain: 126 dB • Low Offset Vol tage Drift: 2.3 μV/°C • Ultra Low I nput Bias Current: 40 fA • Input Comm on-Mode Range Includes V− • Operati ng Range from +5V to +15V Supply • ISS =.
Manufacture

Texas Instruments

Datasheet
Download LMC6034 Datasheet




 LMC6034
LMC6034
www.ti.com
SNOS608C – MAY 1998 – REVISED MARCH 2013
LMC6034 CMOS Quad Operational Amplifier
Check for Samples: LMC6034
FEATURES
1
2 Specified for 2 kΩ and 600Ω Loads
• High Voltage Gain: 126 dB
• Low Offset Voltage Drift: 2.3 μV/°C
• Ultra Low Input Bias Current: 40 fA
• Input Common-Mode Range Includes V
• Operating Range from +5V to +15V Supply
• ISS = 400 μA/Amplifier; Independent of V+
• Low Distortion: 0.01% at 10 kHz
• Slew Rate: 1.1 V/μs
• Improved Performance Over TLC274
DESCRIPTION
The LMC6034 is a CMOS quad operational amplifier
which can operate from either a single supply or dual
supplies. Its performance features include an input
common-mode range that reaches ground, low input
bias current, and high voltage gain into realistic loads,
such as 2 kΩ and 600Ω.
This chip is built with National's advanced Double-
Poly Silicon-Gate CMOS process.
See the LMC6032 datasheet for a CMOS dual
operational amplifier with these same features. For
higher performance characteristics refer to the
LMC660.
APPLICATIONS
• High-Impedance Buffer or Preamplifier
• Current-to-Voltage Converter
• Long-Term Integrator
• Sample-and-Hold Circuit
• Medical Instrumentation
Connection Diagram
Figure 1. 14-Pin SOIC (Top View)
Guard Ring Connections – Non-Inverting Amplifier
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2013, Texas Instruments Incorporated




 LMC6034
LMC6034
SNOS608C – MAY 1998 – REVISED MARCH 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS(1)(2)
Differential Input Voltage
Supply Voltage (V+ V)
Output Short Circuit to V+
Output Short Circuit to V
Lead Temperature (Soldering, 10 sec.)
Storage Temperature Range
Power Dissipation
Voltage at Output/Input Pin
Current at Output Pin
Current at Input Pin
Current at Power Supply Pin
Junction Temperature(5)
ESD Tolerance(6)
±Supply Voltage
16V
See (3)
See (4)
260°C
65°C to +150°C
See (5)
(V+) +0.3V, (V) 0.3V
±18 mA
±5 mA
35 mA
150°C
1000V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test
conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) Do not connect output to V+, when V+ is greater than 13V or reliability may be adversely affected.
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature and/or
multiple Op Amp shorts can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30
mA over long term may adversely affect reliability.
(5) The maximum power dissipation is a function of TJ(max), θJA, TA. The maximum allowable power dissipation at any ambient temperature
is PD = (TJ(max)–TA)/θJA.
(6) Human body model, 100 pF discharged through a 1.5 kΩ resistor.
OPERATING RATINGS(1)
Temperature Range
Supply Voltage Range
Power Dissipation
Thermal Resistance (θJA)(3)
14-Pin SOIC
40°C TJ +85°C
4.75V to 15.5V
See (2)
115°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test
conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
(2) For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ TA)/θJA.
(3) All numbers apply for packages soldered directly into a PC board.
DC ELECTRICAL CHARACTERISTICS
Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V,
V= GND = 0V, VCM = 1.5V, VOUT = 2.5V, and RL > 1M unless otherwise specified.
Symbol
Parameter
Conditions
Typical (1)
LMC6034I
Units
Limit (2)
VOS
Input Offset Voltage
1
9
mV
11
max
ΔVOS/ΔT
Input Offset Voltage
Average Drift
2.3
μV/°C
IB
Input Bias Current
0.04
pA
200
max
(1) Typical values represent the most likely parametric norm.
(2) All limits are guaranteed at room temperature (standard type face) or at operating temperature extremes (bold type face).
2
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: LMC6034




 LMC6034
LMC6034
www.ti.com
SNOS608C – MAY 1998 – REVISED MARCH 2013
DC ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V,
V= GND = 0V, VCM = 1.5V, VOUT = 2.5V, and RL > 1M unless otherwise specified.
Symbol
Parameter
Conditions
Typical (1)
LMC6034I
Units
Limit (2)
IOS
Input Offset Current
0.01
pA
100
max
RIN
CMRR
+PSRR
Input Resistance
Common Mode
Rejection Ratio
Positive Power Supply
0V VCM 12V
V+ = 15V
5V V+ 15V
>1
TeraΩ
83
63
dB
60
min
83
63
dB
PSRR
Rejection Ratio
Negative Power Supply
VO = 2.5V
0V V≤ −10V
60
min
94
74
dB
Rejection Ratio
VCM
Input Common-Mode
Voltage Range
AV
Large Signal Voltage Gain
V+ = 5V & 15V
For CMRR 50 dB
RL = 2 kΩ (3)
Sourcing
0.4
V+ 1.9
2000
70
0.1
0
V+ 2.3
V+ 2.6
200
100
min
V
max
V
min
V/mV
min
Sinking
500
90
V/mV
RL = 600Ω (3)
Sourcing
1000
40
min
100
V/mV
75
min
Sinking
250
50
V/mV
VO
Output Voltage Swing
V+ = 5V
RL = 2 kΩ to 2.5V
20
min
4.87
4.20
V
4.00
min
0.10
0.25
V
V+ = 5V
0.35
max
4.61
4.00
V
RL = 600Ω to 2.5V
3.80
min
0.30
0.63
V
V+ = 15V
14.63
0.75
max
13.50
V
RL = 2 kΩ to 7.5V
13.00
min
0.26
0.45
V
V+ = 15V
13.90
0.55
max
12.50
V
RL = 600Ω to 7.5V
12.00
min
0.79
1.45
V
1.75
max
(3) V+ = 15V, VCM = 7.5V, and RL connected to 7.5V. For Sourcing tests, 7.5V VO 11.5V. For Sinking tests, 2.5V VO 7.5V.
Copyright © 1998–2013, Texas Instruments Incorporated
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