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Operational Amplifier. LMC6024 Datasheet

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Operational Amplifier. LMC6024 Datasheet






LMC6024 Amplifier. Datasheet pdf. Equivalent




LMC6024 Amplifier. Datasheet pdf. Equivalent





Part

LMC6024

Description

Low Power CMOS Quad Operational Amplifier



Feature


LMC6024 www.ti.com SNOS621D – AUGUST 2000 – REVISED MARCH 2013 LMC6024 L ow Power CMOS Quad Operational Amplifie r Check for Samples: LMC6024 FEATURES 1 •2 Specified for 100 kΩ and 5 kΩ Loads • High Voltage Gain 120 dB • Low Offset Voltage Drift 2.5 μV/°C Ultra Low Input Bias Vurrent 40 fA Input Common-mode Range Includes V− • Operating Range from +5V to +15V Su.
Manufacture

Texas Instruments

Datasheet
Download LMC6024 Datasheet


Texas Instruments LMC6024

LMC6024; pply • Low Distortion 0.01% at 1 kHz Slew Rate 0.11 V/μs • Micropower Operation 1 mW APPLICATIONS • High-im pedance Buffer or Preamplifier • Curr ent-to-voltage Converter • Long-term Integrator • Sample-and-hold Circuit • Peak Detector • Medical Instrumen tation • Industrial Controls DESCRIP TION The LMC6024 is a CMOS quad operati onal amplifier which can operate from e.


Texas Instruments LMC6024

ither a single supply or dual supplies. Its performance features include an inp ut common-mode range that reaches V−, low input bias current and voltage gai n (into 100 kΩ and 5 kΩ loads) that i s equal to or better than widely accept ed bipolar equivalents, while the power supply requirement is less than 1 mW. This chip is built with Texas Instrumen t's advanced Double-Po.


Texas Instruments LMC6024

ly Silicon-Gate CMOS process. See the LM C6022 datasheet for a CMOS dual operati onal amplifier with these same features . Connection Diagram Top View Figure 1. 14-Pin DIP and SOIC Package See Pac kage Number D0014A These devices have l imited built-in ESD protection. The lea ds should be shorted together or the de vice placed in conductive foam during s torage or handling.

Part

LMC6024

Description

Low Power CMOS Quad Operational Amplifier



Feature


LMC6024 www.ti.com SNOS621D – AUGUST 2000 – REVISED MARCH 2013 LMC6024 L ow Power CMOS Quad Operational Amplifie r Check for Samples: LMC6024 FEATURES 1 •2 Specified for 100 kΩ and 5 kΩ Loads • High Voltage Gain 120 dB • Low Offset Voltage Drift 2.5 μV/°C Ultra Low Input Bias Vurrent 40 fA Input Common-mode Range Includes V− • Operating Range from +5V to +15V Su.
Manufacture

Texas Instruments

Datasheet
Download LMC6024 Datasheet




 LMC6024
LMC6024
www.ti.com
SNOS621D – AUGUST 2000 – REVISED MARCH 2013
LMC6024 Low Power CMOS Quad Operational Amplifier
Check for Samples: LMC6024
FEATURES
1
2 Specified for 100 kΩ and 5 kΩ Loads
• High Voltage Gain 120 dB
• Low Offset Voltage Drift 2.5 μV/°C
• Ultra Low Input Bias Vurrent 40 fA
• Input Common-mode Range Includes V
• Operating Range from +5V to +15V Supply
• Low Distortion 0.01% at 1 kHz
• Slew Rate 0.11 V/μs
• Micropower Operation 1 mW
APPLICATIONS
• High-impedance Buffer or Preamplifier
• Current-to-voltage Converter
• Long-term Integrator
• Sample-and-hold Circuit
• Peak Detector
• Medical Instrumentation
• Industrial Controls
DESCRIPTION
The LMC6024 is a CMOS quad operational amplifier
which can operate from either a single supply or dual
supplies. Its performance features include an input
common-mode range that reaches V, low input bias
current and voltage gain (into 100 kΩ and 5 kΩ loads)
that is equal to or better than widely accepted bipolar
equivalents, while the power supply requirement is
less than 1 mW.
This chip is built with Texas Instrument's advanced
Double-Poly Silicon-Gate CMOS process.
See the LMC6022 datasheet for a CMOS dual
operational amplifier with these same features.
Connection Diagram
Top View
Figure 1. 14-Pin DIP and SOIC Package
See Package Number D0014A
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated




 LMC6024
LMC6024
SNOS621D – AUGUST 2000 – REVISED MARCH 2013
www.ti.com
Absolute Maximum Ratings (1)(2)
Differential Input Voltage
Supply Voltage (V+ V)
Lead Temperature
Storage Temperature Range
Voltage at Output/Input Pin
Current at Input Pin
Current at Output Pin
Current at Power Supply Pin
Output Short Circuit to V+
Output Short Circuit to V
Junction Temperature
ESD Tolerance(5)
Power Dissipation
Soldering, 10 sec.
±Supply Voltage
16V
260°C
65°C to +150°C
(V+) + 0.3V, (V) 0.3V
±5 mA
±18 mA
35 mA
See (3)
See (4)
150°C
1000V
See (6)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test
conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Do not connect output to V+ when V+ is greater than 13V or reliability may be adversely affected.
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature and/or
multiple Op Amp shorts can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30
mA over long term may adversly affect reliability.
(5) Human body model, 100 pF discharge through a 1.5 kΩ resistor.
(6) The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(max) TA)/θJA.
Operating Ratings
Temperature Range
Supply Voltage Range
Power Dissipation
Thermal Resistance (θJA)(2)
14-Pin DIP
14-Pin SOIC
40°C TJ +85°C
4.75V to 15.5V
See (1)
85°C/W
115°C/W
(1) For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ TA)/θJA.
(2) All numbers apply for packages soldered directly into a PC board.
2
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Copyright © 2000–2013, Texas Instruments Incorporated




 LMC6024
LMC6024
www.ti.com
SNOS621D – AUGUST 2000 – REVISED MARCH 2013
DC Electrical Characteristics
The following specifications apply for V+ = 5V, V= 0V, VCM = 1.5V, VO = 2.5V, and RL = 1M unless otherwise noted.
Boldface limits apply at the temperature extremes; all other limits TJ = 25°C.
Parameter
Test Conditions
Typical (1)
LMC6024I
Limit (2)
Units
VOS
Input Offset Voltage
1
9
mV
11
Max
ΔVOS/ΔT
Input Offset Voltage Average
Drift
2.5
μV/°C
IB
Input Bias Current
0.04
pA
200
Max
IOS
Input Offset Current
0.01
pA
100
Max
RIN
CMRR
+PSRR
Input Resistance
Common Mode Rejection
Ratio
Positive Power Supply
Rejection Ratio
0V VCM 12V
V+ = 15V
5V V+ 15V
>1
TeraΩ
83
63
dB
61
Min
83
63
dB
61
Min
PSRR
VCM
Negative Power Supply
Rejection Ratio
Input Common-Mode Voltage
Range
0V V≤ −10V
V+ = 5V and 15V
For CMRR 50 DB
AV
Large Signal Voltage Gain
RL = 100 kΩ(3)
Sourcing
94
0.4
V+ 1.9
1000
74
73
0.1
0
V+ 2.3
V+ 2.5
200
100
dB
Min
V
Max
V
Min
V/mV
Min
RL = 5 kΩ (3)
Sinking
Sourcing
500
1000
90
V/mV
40
Min
100
V/mV
75
Min
Sinking
VO
Output Voltage Swing
V+ = 5V
RL = 100 kΩ to 2.5V
250
4.987
50
V/mV
20
Min
4.40
V
4.43
Min
V+ = 5V
RL = 5 kΩ to 2.5V
0.004
4.940
0.06
V
0.09
Max
4.20
V
4.00
Min
V+ = 15V
RL = 100 kΩ to 7.5V
0.040
0.25
V
0.35
Max
14.970
14.00
V
13.90
Min
V+ = 15V
RL = 5 kΩ to 7.5V
0.007
0.06
V
0.09
Max
14.840
13.70
V
13.50
Min
0.110
0.32
V
0.40
Max
(1) Typical values represent the most likely parametric norm.
(2) All limits are guaranteed by testing or correlation.
(3) V+ = 15V, VCM = 7.5V, and RL connected to 7.5V. For Sourcing tests, 7.5V VO 11.5V. For Sinking tests, 2.5V VO 7.5V.
Copyright © 2000–2013, Texas Instruments Incorporated
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3
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