DatasheetsPDF.com

OPERATIONAL AMPLIFIER. LMC6061 Datasheet

DatasheetsPDF.com

OPERATIONAL AMPLIFIER. LMC6061 Datasheet






LMC6061 AMPLIFIER. Datasheet pdf. Equivalent




LMC6061 AMPLIFIER. Datasheet pdf. Equivalent





Part

LMC6061

Description

PRECISION CMOS SINGLE MICROPOWER OPERATIONAL AMPLIFIER



Feature


LMC6061 www.ti.com SNOS648D – NOVEMB ER 1994 – REVISED MARCH 2013 PRECISI ON CMOS SINGLE MICROPOWER OPERATIONAL A MPLIFIER Check for Samples: LMC6061 FE ATURES 1 2(Typical Unless Otherwise Not ed) • Low Offset Voltage: 100 µV • Ultra Low Supply Current: 20 μA • O perates From 4.5V to 15V Single Supply • Ultra Low Input Bias Current: 10 fA • Output Swing Within 10 mV of .
Manufacture

Texas Instruments

Datasheet
Download LMC6061 Datasheet


Texas Instruments LMC6061

LMC6061; Supply Rail, 100k Load • Input Common- mode Range Includes V− • High Volta ge Gain: 140 dB • Improved Latchup Im munity APPLICATIONS • Instrumentation Amplifier • Photodiode and Infrared Detector Preamplifier • Transducer Am plifiers • Hand-held Analytic Instrum ents • Medical Instrumentation • D/ A Converter • Charge Amplifier for Pi ezoelectric Transducers DESCRIPTION The.


Texas Instruments LMC6061

LMC6061 is a precision single low offse t voltage, micropower operational ampli fier, capable of precision single suppl y operation. Performance characteristic s include ultra low input bias current, high voltage gain, rail-to-rail output swing, and an input common mode voltag e range that includes ground. These fea tures, plus its low power consumption, make the LMC6061 i.


Texas Instruments LMC6061

deally suited for battery powered applic ations. Other applications using the LM C6061 include precision full-wave recti fiers, integrators, references, sample- and-hold circuits, and true instrumenta tion amplifiers. This device is built w ith TI's advanced double-Poly Silicon-G ate CMOS process. For designs that requ ire higher speed, see the LMC6081 preci sion single operat.

Part

LMC6061

Description

PRECISION CMOS SINGLE MICROPOWER OPERATIONAL AMPLIFIER



Feature


LMC6061 www.ti.com SNOS648D – NOVEMB ER 1994 – REVISED MARCH 2013 PRECISI ON CMOS SINGLE MICROPOWER OPERATIONAL A MPLIFIER Check for Samples: LMC6061 FE ATURES 1 2(Typical Unless Otherwise Not ed) • Low Offset Voltage: 100 µV • Ultra Low Supply Current: 20 μA • O perates From 4.5V to 15V Single Supply • Ultra Low Input Bias Current: 10 fA • Output Swing Within 10 mV of .
Manufacture

Texas Instruments

Datasheet
Download LMC6061 Datasheet




 LMC6061
LMC6061
www.ti.com
SNOS648D – NOVEMBER 1994 – REVISED MARCH 2013
PRECISION CMOS SINGLE MICROPOWER OPERATIONAL AMPLIFIER
Check for Samples: LMC6061
FEATURES
1
2(Typical Unless Otherwise Noted)
• Low Offset Voltage: 100 µV
• Ultra Low Supply Current: 20 μA
• Operates From 4.5V to 15V Single Supply
• Ultra Low Input Bias Current: 10 fA
• Output Swing Within 10 mV of Supply Rail,
100k Load
• Input Common-mode Range Includes V
• High Voltage Gain: 140 dB
• Improved Latchup Immunity
APPLICATIONS
• Instrumentation Amplifier
• Photodiode and Infrared Detector Preamplifier
• Transducer Amplifiers
• Hand-held Analytic Instruments
• Medical Instrumentation
• D/A Converter
• Charge Amplifier for Piezoelectric Transducers
DESCRIPTION
The LMC6061 is a precision single low offset voltage,
micropower operational amplifier, capable of
precision single supply operation. Performance
characteristics include ultra low input bias current,
high voltage gain, rail-to-rail output swing, and an
input common mode voltage range that includes
ground. These features, plus its low power
consumption, make the LMC6061 ideally suited for
battery powered applications.
Other applications using the LMC6061 include
precision full-wave rectifiers, integrators, references,
sample-and-hold circuits, and true instrumentation
amplifiers.
This device is built with TI's advanced double-Poly
Silicon-Gate CMOS process.
For designs that require higher speed, see the
LMC6081 precision single operational amplifier.
For a dual or quad operational amplifier with similar
features, see the LMC6062 or LMC6064 respectively.
PATENT PENDING
Connection Diagrams
Figure 1. 8-Pin PDIP/SOIC
Top View
Figure 2. Distribution of LMC6061 Input Offset
Voltage (TA = +25°C)
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1994–2013, Texas Instruments Incorporated




 LMC6061
LMC6061
SNOS648D – NOVEMBER 1994 – REVISED MARCH 2013
www.ti.com
Absolute Maximum Ratings(1)(2)(3)
Differential Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+ V)
Output Short Circuit to V+
Output Short Circuit to V
Lead Temperature (Soldering, 10 sec.)
ESD Tolerance(6)
Current at Input Pin
Current at Output Pin
Current at Power Supply Pin
Power Dissipation
Storage Temp. Range
Junction Temperature
±Supply Voltage
(V+) +0.3V,
(V) 0.3V
16V
See (4)
See (5)
65°C to +150°C
150°C
2 kV
±10 mA
±30 mA
40 mA
See (7)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) For specified Military Temperature Range parameters see RETSMC6061X.
(4) Do not connect output to V+, when V+ is greater than 13V or reliability witll be adversely affected.
(5) Applies to both single-supply and split-supply operation. Continous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
(6) Human body model, 1.5 kΩ in series with 100 pF.
(7) The maximum power dissipation is a function of TJ(Max), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(Max) TA)/θJA.
Operating Ratings(1)
Temperature Range
Supply Voltage
Thermal Resistance (θJA)(2)
Power Dissipation
LMC6061AM
LMC6061AI, LMC6082I
P0008E Package, 8-Pin PDIP
D0008A Package, 8-Pin SOIC
55°C TJ +125°C
40°C TJ +85°C
4.5V V+ 15.5V
115°C/W
193°C/W
See (3)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
(2) All numbers apply for packages soldered directly into a PC board.
(3) For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ–TA)/θJA.
2
Submit Documentation Feedback
Product Folder Links: LMC6061
Copyright © 1994–2013, Texas Instruments Incorporated




 LMC6061
LMC6061
www.ti.com
SNOS648D – NOVEMBER 1994 – REVISED MARCH 2013
DC Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V, V=
0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
Symbol
Parameter
Conditions
Typ (1)
LMC6061AM
Limit (2)
LMC6061AI LMC6061I
Limit (2)
Limit (2)
Units
VOS
Input Offset Voltage
100
350
1200
350
800
μV
900
1300
Max
TCVOS Input Offset Voltage
1.0
Average Drift
μV/°C
IB
Input Bias Current
0.010
100
pA
4
4
Max
IOS
Input Offset Current
0.005
100
pA
2
2
Max
RIN
CMRR
+PSRR
Input Resistance
Common Mode Rejection
Ratio
0V VCM 12.0V
V+ = 15V
Positive Power Supply
Rejection Ratio
5V V+ 15V
VO = 2.5V
>10
85
75
70
85
75
70
Tera Ω
75
66
dB
72
63
Min
75
66
dB
72
63
Min
PSRR
VCM
Negative Power Supply
Rejection Ratio
Input Common-Mode
Voltage Range
0V V≤ −10V
V+ = 5V and 15V
for CMRR 60 dB
100
0.4
V+ 1.9
AV
Large Signal Voltage Gain RL = 100 kΩ(3) Sourcing
4000
84
70
0.1
0
V+ 2.3
V+ 2.6
400
200
84
81
0.1
0
V+ 2.3
V+ 2.5
400
300
74
71
0.1
0
V+ 2.3
V+ 2.5
300
200
dB
Min
V
Max
V
Min
V/mV
Min
Sinking
3000
180
180
90
V/mV
70
RL = 25 kΩ(3) Sourcing
3000
400
150
100
60
Min
400
200
V/mV
150
80
Min
Sinking
2000
100
100
70
V/mV
35
50
35
Min
(1) For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ–TA)/θJA
(2) All limits are specified by testing or statistical analysis.
(3) V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V VO 11.5V. For Sinking tests, 2.5V VO 7.5V.
Copyright © 1994–2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: LMC6061



Recommended third-party LMC6061 Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)