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Operational Amplifier. LMC6082 Datasheet

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Operational Amplifier. LMC6082 Datasheet






LMC6082 Amplifier. Datasheet pdf. Equivalent




LMC6082 Amplifier. Datasheet pdf. Equivalent





Part

LMC6082

Description

CMOS Dual Operational Amplifier



Feature


LMC6082 www.ti.com SNOS630D – AUGUST 2000 – REVISED MARCH 2013 LMC6082 P recision CMOS Dual Operational Amplifie r Check for Samples: LMC6082 FEATURES 1 •2 (Typical Unless Otherwise Stated ) • Low Offset Voltage: 150 μV • O perates from 4.5V to 15V Single Supply • Ultra Low Input Bias Current: 10 fA • Output Swing to Within 20 mV of Su pply Rail, 100k Load • Input Comm.
Manufacture

Texas Instruments

Datasheet
Download LMC6082 Datasheet


Texas Instruments LMC6082

LMC6082; on-Mode Range Includes V− • High Vol tage Gain: 130 dB • Improved Latchup Immunity APPLICATIONS • Instrumentati on Amplifier • Photodiode and Infrare d Detector Preamplifier • Transducer Amplifiers • Medical Instrumentation • D/A Converter • Charge Amplifier for Piezoelectric Transducers DESCRIPT ION The LMC6082 is a precision dual low offset voltage operational amplifie.


Texas Instruments LMC6082

r, capable of single supply operation. P erformance characteristics include ultr a low input bias current, high voltage gain, rail-to-rail output swing, and an input common mode voltage range that i ncludes ground. These features, plus it s low offset voltage, make the LMC6082 ideally suited for precision circuit ap plications. Other applications using th e LMC6082 include .


Texas Instruments LMC6082

precision full-wave rectifiers, integrat ors, references, and sample-and-hold ci rcuits. This device is built with TI's advanced Double-Poly Silicon-Gate CMOS process. For designs with more critical power demands, see the LMC6062 precisi on dual micropower operational amplifie r. PATENT PENDING Connection Diagram Figure 1. 8-Pin PDIP/SOIC Top View Fig ure 2. Input Bias .

Part

LMC6082

Description

CMOS Dual Operational Amplifier



Feature


LMC6082 www.ti.com SNOS630D – AUGUST 2000 – REVISED MARCH 2013 LMC6082 P recision CMOS Dual Operational Amplifie r Check for Samples: LMC6082 FEATURES 1 •2 (Typical Unless Otherwise Stated ) • Low Offset Voltage: 150 μV • O perates from 4.5V to 15V Single Supply • Ultra Low Input Bias Current: 10 fA • Output Swing to Within 20 mV of Su pply Rail, 100k Load • Input Comm.
Manufacture

Texas Instruments

Datasheet
Download LMC6082 Datasheet




 LMC6082
LMC6082
www.ti.com
SNOS630D – AUGUST 2000 – REVISED MARCH 2013
LMC6082 Precision CMOS Dual Operational Amplifier
Check for Samples: LMC6082
FEATURES
1
2 (Typical Unless Otherwise Stated)
• Low Offset Voltage: 150 μV
• Operates from 4.5V to 15V Single Supply
• Ultra Low Input Bias Current: 10 fA
• Output Swing to Within 20 mV of Supply Rail,
100k Load
• Input Common-Mode Range Includes V
• High Voltage Gain: 130 dB
• Improved Latchup Immunity
APPLICATIONS
• Instrumentation Amplifier
• Photodiode and Infrared Detector Preamplifier
• Transducer Amplifiers
• Medical Instrumentation
• D/A Converter
• Charge Amplifier for Piezoelectric Transducers
DESCRIPTION
The LMC6082 is a precision dual low offset voltage
operational amplifier, capable of single supply
operation. Performance characteristics include ultra
low input bias current, high voltage gain, rail-to-rail
output swing, and an input common mode voltage
range that includes ground. These features, plus its
low offset voltage, make the LMC6082 ideally suited
for precision circuit applications.
Other applications using the LMC6082 include
precision full-wave rectifiers, integrators, references,
and sample-and-hold circuits.
This device is built with TI's advanced Double-Poly
Silicon-Gate CMOS process.
For designs with more critical power demands, see
the LMC6062 precision dual micropower operational
amplifier.
PATENT PENDING
Connection Diagram
Figure 1. 8-Pin PDIP/SOIC
Top View
Figure 2. Input Bias Current vs Temperature
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated




 LMC6082
LMC6082
SNOS630D – AUGUST 2000 – REVISED MARCH 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Absolute Maximum Ratings (1)(2)
Differential Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+ V)
Output Short Circuit to V+
Output Short Circuit to V
Lead Temperature (Soldering, 10 Sec.)
Storage Temp. Range
Junction Temperature
ESD Tolerance (5)
Current at Input Pin
Current at Output Pin
Current at Power Supply Pin
Power Dissipation
±Supply Voltage
(V+) +0.3V,
(V) 0.3V
16V
See (3)
See (4)
260°C
65°C to +150°C
150°C
2 kV
±10 mA
±30 mA
40 mA
See (6)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) Do not connect output to V+, when V+ is greater than 13V or reliability will be adversely affected.
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
(5) Human body model, 1.5 kΩ in series with 100 pF.
(6) The maximum power dissipation is a function of TJ(Max), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(Max) TA) /θJA.
Operating Ratings (1)
Temperature Range
Supply Voltage
Thermal Resistance (θJA) (2)
Power Dissipation
LMC6082AM
LMC6082AI, LMC6082I
8-Pin PDIP
8-Pin SOIC
55°C TJ +125°C
40°C TJ +85°C
4.5V V+ 15.5V
115°C/W
193°C/W
See (3)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
(2) All numbers apply for packages soldered directly into a PC board.
(3) For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ TA)/θJA. All
numbers apply for packages soldered directly into a PC board.
2
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Product Folder Links: LMC6082
Copyright © 2000–2013, Texas Instruments Incorporated




 LMC6082
LMC6082
www.ti.com
SNOS630D – AUGUST 2000 – REVISED MARCH 2013
DC Electrical Characteristics
Unless otherwise specified, all limits specified for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V, V=
0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
Symbol
Parameter
Conditions
Typ (1)
LMC6082AM
Limit (2)
LMC6082AI
Limit (2)
LMC6082I
Limit (2)
Units
VOS
Input Offset Voltage
150
350
1000
350
800
μV
800
1300
Max
TCVOS
Input Offset Voltage
Average Drift
1.0
μV/°C
IB
Input Bias Current
0.010
100
pA
4
4
Max
IOS
Input Offset Current
0.005
100
pA
2
2
Max
RIN
CMRR
+PSRR
Input Resistance
Common Mode Rejection
Ratio
Positive Power Supply
Rejection Ratio
0V VCM 12.0V
V+ = 15V
5V V+ 15V
VO = 2.5V
>10
85
75
72
85
75
72
Tera Ω
75
66
dB
72
63
Min
75
66
dB
72
63
Min
PSRR
VCM
Negative Power Supply
Rejection Ratio
Input Common-Mode
Voltage Range
0V V≤ −10V
V+ = 5V and 15V
for CMRR 60 dB
94
0.4
V+ 1.9
AV
Large Signal Voltage Gain RL = 2 kΩ (3) Sourcing
1400
84
81
0.1
0
V+ 2.3
V+ 2.6
400
300
84
81
0.1
0
V+ 2.3
V+ 2.5
400
300
74
71
0.1
0
V+ 2.3
V+ 2.5
300
200
dB
Min
V
Max
V
Min
V/mV
Min
Sinking
350
180
180
90
V/mV
70
RL = 600Ω (3) Sourcing
1200
400
150
100
60
Min
400
200
V/mV
150
80
Min
Sinking
150
100
100
70
V/mV
35
50
35
Min
(1) Typical values represent the most likely parametric norm.
(2) All limits are specified by testing or statistical analysis.
(3) V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V VO 11.5V. For Sinking tests, 2.5V VO 7.5V.
Copyright © 2000–2013, Texas Instruments Incorporated
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3
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