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Power Supervisor. LMC6953 Datasheet

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Power Supervisor. LMC6953 Datasheet






LMC6953 Supervisor. Datasheet pdf. Equivalent




LMC6953 Supervisor. Datasheet pdf. Equivalent





Part

LMC6953

Description

PCI Local Bus Power Supervisor



Feature


LMC6953 www.ti.com SNVS132D – APRIL 1998 – REVISED APRIL 2013 LMC6953 PC I Local Bus Power Supervisor Check for Samples: LMC6953 FEATURES 1 •2 Compl iant to PCI Specifications Revision 2.1 . • Under and Over Voltage Detectors for 5V and 3.3V • Power Failure Detec tion (5V Falling Under 3.3V by 300 mV M ax) • Manual Reset Input Pin • Spec ified RESET Assertion at VDD = 1.
Manufacture

Texas Instruments

Datasheet
Download LMC6953 Datasheet


Texas Instruments LMC6953

LMC6953; .5V • Integrated Reset Delay Circuitry • Open Drain Output • Adjustable R eset Delay • Response Time for Over a nd Under Voltage Detection: 490 ns Max • Power Failure Response Time: 90 ns Max • Requires Minimal External Compo nents APPLICATIONS • Desktop PCs • PCI-Based Systems • Network servers DESCRIPTION The LMC6953 is a voltage su pervisory chip designed to meet PCI .


Texas Instruments LMC6953

(Peripheral Component Interconnect) Spec ifications Revision 2.1. It monitors 5V and 3.3V power supplies. In cases of p ower-up, power-down, brown-out, power f ailure and manual reset interrupt, the LMC6953 provides an active low reset. R ESET holds low for 100 ms after both 5V and 3.3V powers recover, or after manu al reset signal returns to high state. The external capac.


Texas Instruments LMC6953

itor on pin 8 adjusts the reset delay. T his part is ideal on PCI motherboards o r add-in cards to ensure the integrity of the entire system when there is a fa ult condition. The active low reset set s the microprocessor or local device in a known state. The LMC6953 has a built -in bandgap reference that accurately d etermines all the threshold voltages. T he internal reset .

Part

LMC6953

Description

PCI Local Bus Power Supervisor



Feature


LMC6953 www.ti.com SNVS132D – APRIL 1998 – REVISED APRIL 2013 LMC6953 PC I Local Bus Power Supervisor Check for Samples: LMC6953 FEATURES 1 •2 Compl iant to PCI Specifications Revision 2.1 . • Under and Over Voltage Detectors for 5V and 3.3V • Power Failure Detec tion (5V Falling Under 3.3V by 300 mV M ax) • Manual Reset Input Pin • Spec ified RESET Assertion at VDD = 1.
Manufacture

Texas Instruments

Datasheet
Download LMC6953 Datasheet




 LMC6953
LMC6953
www.ti.com
SNVS132D – APRIL 1998 – REVISED APRIL 2013
LMC6953 PCI Local Bus Power Supervisor
Check for Samples: LMC6953
FEATURES
1
2 Compliant to PCI Specifications Revision 2.1.
• Under and Over Voltage Detectors for 5V and
3.3V
• Power Failure Detection (5V Falling Under 3.3V
by 300 mV Max)
• Manual Reset Input Pin
• Specified RESET Assertion at VDD = 1.5V
• Integrated Reset Delay Circuitry
• Open Drain Output
• Adjustable Reset Delay
• Response Time for Over and Under Voltage
Detection: 490 ns Max
• Power Failure Response Time: 90 ns Max
• Requires Minimal External Components
APPLICATIONS
• Desktop PCs
• PCI-Based Systems
• Network servers
DESCRIPTION
The LMC6953 is a voltage supervisory chip designed
to meet PCI (Peripheral Component Interconnect)
Specifications Revision 2.1. It monitors 5V and 3.3V
power supplies. In cases of power-up, power-down,
brown-out, power failure and manual reset interrupt,
the LMC6953 provides an active low reset. RESET
holds low for 100 ms after both 5V and 3.3V powers
recover, or after manual reset signal returns to high
state. The external capacitor on pin 8 adjusts the
reset delay.
This part is ideal on PCI motherboards or add-in
cards to ensure the integrity of the entire system
when there is a fault condition. The active low reset
sets the microprocessor or local device in a known
state.
The LMC6953 has a built-in bandgap reference that
accurately determines all the threshold voltages. The
internal reset delay circuitry eliminates additional
discrete components.
Typical Application Circuits
Figure 1. On Mother Board
Figure 2. On Add-in Cards
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2013, Texas Instruments Incorporated




 LMC6953
LMC6953
SNVS132D – APRIL 1998 – REVISED APRIL 2013
Connection Diagram
www.ti.com
Figure 3. 8–Pin SOIC
Top View
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS(1)(2)
ESD Tolerance (3)
Human Body Model
Machine Model
Voltage at Input Pin
Supply Voltage
Current at Output Pin
Current at Power Supply Pin (4)
Lead Temp. (Soldering, 10 sec.)
Storage Temperature Range
Junction Temperature
2 kV
200V
7V
7V
15 mA
10 mA
260°C
65°C to +150°C
150°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see DC ELECTRICAL CHARACTERISTICS and AC ELECTRICAL CHARACTERISTICS.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) Human body model, 1.5 kΩ in series with 100 pF. Machine model. 200Ω in series with 100 pF.
(4) Supply current measured at pins 1, 2, and 3. The 4.7 kΩ pull-up resistor on pin 7 is not tied to VDDin this measurement.
OPERATING RATINGS(1)
Supply Voltage
Junction Temperature Range
LMC6953C
Thermal Resistance (θJA)
D Package
1.5V to 6V
40°C to +85°C
165°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see DC ELECTRICAL CHARACTERISTICS and AC ELECTRICAL CHARACTERISTICS.
2
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Product Folder Links: LMC6953
Copyright © 1998–2013, Texas Instruments Incorporated




 LMC6953
LMC6953
www.ti.com
SNVS132D – APRIL 1998 – REVISED APRIL 2013
DC ELECTRICAL CHARACTERISTICS
Unless otherwise specified, all boldface limits specified for TJ = 40°C to +85°C, VDD = 5V, RPULL-UP = 4.7 kΩ and CEXT = 0.01
μF. Typical numbers are room temperature (25°C) performance.
Symbol
VH5
Parameter
VDD Over-Voltage Threshold
VL5
VDD Under-Voltage Threshold
VH3.3
3.3V Over-Voltage Threshold
VL3.3
3.3V Under-Voltage Threshold
VMR
Manual RESET Threshold
VPF
Power Failure Differential Voltage
(3.3V Pin–5V Pin)
Conditions
TJ = 0°C to 70°C (1)
TJ = 40°C to 85°C (1)
TJ = 0°C to 70°C (1)
TJ = 40°C to 85°C (1)
TJ = 0°C to 70°C (2)
TJ = 40°C to 85°C (2)
TJ = 0°C to 70°C (2)
TJ = 40°C to 85°C (2)
(3)
Min
5.45
5.30
4.25
4.10
3.80
3.60
2.50
2.30
Typ
5.60
5.60
4.40
4.40
3.95
3.95
2.65
2.65
2.50
150
Max
5.75
5.90
4.55
4.70
4.10
4.30
2.80
3.00
2.80
300
Units
V
V
V
V
V
V
V
V
V
mV
RIN
Input Resistance at 5V and 3.3V Pins
VOL
RESET Output Low
TJ = 0°C to 70°C
VDD = 1.5V to 6V
IS
Supply Current
TJ = 40°C to 85°C
VDD = 1.55V to 6V
(4)
35
kΩ
0.05
0.10
V
0.8
1.50
mA
(1) PCI Specifications Revision 2.1, Section 4.2.1.1 and Section 4.3.2.
(2) PCI Specifications Revision 2.1, Section 4.2.2.1 and Section 4.3.2.
(3) PCI Specifications Revision 2.1 and Section 4.3.2.
(4) Supply current measured at pins 1, 2, and 3. The 4.7 kΩ pull-up resistor on pin 7 is not tied to VDDin this measurement.
AC ELECTRICAL CHARACTERISTICS
Unless otherwise specified, all boldface limits specified for TJ = 40°C to 85°C, VDD = 5V, RPULL-UP = 4.7 kΩ and CEXT = 0.01
μF. Typical numbers are room temperature (25°C) performance.
Symbol
tD
tPF
Parameter
Over or Under Voltage Response Time
Power Failure Response Time
Conditions
(1)
(2)
Typ
LMC6953
Limit
150
490
40
90
Units
ns
max
ns
max
tRESET
Reset Delay
CEXT = 0.01 μF
100
ms
(1) PCI Specifications Revision 2.1, Section 4.3.2. The response time is measured individually with ±750 mV of overdrive applied to pin 2
then ±600 mV of overdrive applied to pin 3 and taking the worst number of the four measurements.
(2) PCI Specifications Revision 2.1, Section 4.3.2. The power failure response time is measured with a signal changing from 5V to 3V
applied to pin 2 and a 3.3V DC applied to pin 3.
Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: LMC6953
Submit Documentation Feedback
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