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Inverter Gate. SN74AUC1G04 Datasheet

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Inverter Gate. SN74AUC1G04 Datasheet






SN74AUC1G04 Gate. Datasheet pdf. Equivalent




SN74AUC1G04 Gate. Datasheet pdf. Equivalent





Part

SN74AUC1G04

Description

Single Inverter Gate



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity SN74AUC1G04 SCES370R – SEPTEM BER 2001 – REVISED JUNE 2017 SN74AUC1 G04 Single Inverter Gate 1 Features 1 Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protectio n Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Dev.
Manufacture

Texas Instruments

Datasheet
Download SN74AUC1G04 Datasheet


Texas Instruments SN74AUC1G04

SN74AUC1G04; ice Model (C101) • Available in the Te xas Instruments NanoFree™ Package • Optimized for 1.8-V Operation and Is 3 .6-V I/O Tolerant to Support Mixed-Mode Signal Operation • Ioff Supports Par tial Power Down Mode and Back Drive Pro tection • Sub-1-V Operable • Max tp d of 2.2 ns at 1.8 V • Low Power Cons umption, 10-µA Maximum ICC • ±8-mA Output Drive at 1.8 V 2 Applications.


Texas Instruments SN74AUC1G04

• AV Receiver • Audio Dock: Portabl e • Blu-Ray Player and Home Theater Embedded PC • MP3 Player/Recorder (Portable Audio) • Personal Digital A ssistant (PDA) • Power: Telecom/Serve r AC/DC Supply: Single Controller: Anal og and Digital • Solid State Drive (S SD): Client and Enterprise • TV: LCD/ Digital and High-Definition (HDTV) • Tablet: Enterprise • Video Analytics: .


Texas Instruments SN74AUC1G04

Server • Wireless Headset, Keyboard, a nd Mouse 3 Description This single inv erter gate is operational at 0.8-V to 2 .7V VCC, but is designed specifically f or 1.65-V to 1.95V VCC operation. The S N74AUC1G04 performs the Boolean functio n Y = A. NanoFree™ package technology is a major breakthrough in IC packagin g concepts, using the die as the packag e. This device is full.

Part

SN74AUC1G04

Description

Single Inverter Gate



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity SN74AUC1G04 SCES370R – SEPTEM BER 2001 – REVISED JUNE 2017 SN74AUC1 G04 Single Inverter Gate 1 Features 1 Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protectio n Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Dev.
Manufacture

Texas Instruments

Datasheet
Download SN74AUC1G04 Datasheet




 SN74AUC1G04
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SN74AUC1G04
SCES370R – SEPTEMBER 2001 – REVISED JUNE 2017
SN74AUC1G04 Single Inverter Gate
1 Features
1 Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
• Available in the Texas Instruments NanoFree™
Package
• Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal Operation
• Ioff Supports Partial Power Down Mode and Back
Drive Protection
• Sub-1-V Operable
• Max tpd of 2.2 ns at 1.8 V
• Low Power Consumption, 10-µA Maximum ICC
• ±8-mA Output Drive at 1.8 V
2 Applications
• AV Receiver
• Audio Dock: Portable
• Blu-Ray Player and Home Theater
• Embedded PC
• MP3 Player/Recorder (Portable Audio)
• Personal Digital Assistant (PDA)
• Power: Telecom/Server AC/DC Supply: Single
Controller: Analog and Digital
• Solid State Drive (SSD): Client and Enterprise
• TV: LCD/Digital and High-Definition (HDTV)
• Tablet: Enterprise
• Video Analytics: Server
• Wireless Headset, Keyboard, and Mouse
3 Description
This single inverter gate is operational at 0.8-V to 2.7-
V VCC, but is designed specifically for 1.65-V to 1.95-
V VCC operation.
The SN74AUC1G04 performs the Boolean function Y
= A.
NanoFree™ package technology is a major
breakthrough in IC packaging concepts, using the die
as the package.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
ouput, preventing damaging current backflow through
the device when it is powered down.
For more information about AUC Little Logic devices,
see Applications of Texas Instruments AUC Sub-1-V
Little Logic Devices, SCEA027.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74AUC1G04DBV SOT-23 (5)
2.90 mm × 1.60 mm
SN74AUC1G04DCK SC70 (5)
2.00 mm × 1.25 mm
SN74AUC1G04DRL SOT-5X3 (5)
1.60 mm × 1.20 mm
SN74AUC1G04DRY SON (6)
1.45 mm × 1.00 mm
SN74AUC1G04YZP DSBGA (5)
1.39 mm × 0.89 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
2
A
4
Y
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.




 SN74AUC1G04
SN74AUC1G04
SCES370R – SEPTEMBER 2001 – REVISED JUNE 2017
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 5
6.6 Switching Characteristics: CL = 15 pF ...................... 5
6.7 Switching Characteristics: CL = 30 pF ...................... 5
6.8 Operating Characteristics.......................................... 6
7 Parameter Measurement Information .................. 7
8 Detailed Description .............................................. 8
8.1 Functional Block Diagram ......................................... 8
8.2 Device Functional Modes.......................................... 8
9 Device and Documentation Support.................... 9
9.1 Documentation Support ............................................ 9
9.2 Receiving Notification of Documentation Updates.... 9
9.3 Community Resources.............................................. 9
9.4 Trademarks ............................................................... 9
9.5 Electrostatic Discharge Caution ................................ 9
9.6 Glossary .................................................................... 9
10 Mechanical, Packaging, and Orderable
Information ............................................................. 9
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision Q (April 2007) to Revision R
Page
• Added Applications, Device Information table, Pin Configuration and Functions section, ESD Ratings table, Thermal
Information table, Feature Description section, Device Functional Modes, Device and Documentation Support
section, and Mechanical, Packaging, and Orderable Information section.............................................................................. 1
• Deleted Ordering Information table, see Mechanical, Packaging, and Orderable Information at the end of the data
sheet ...................................................................................................................................................................................... 1
2
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Copyright © 2001–2017, Texas Instruments Incorporated
Product Folder Links: SN74AUC1G04




 SN74AUC1G04
www.ti.com
5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
NC
DCK Package
5-Pin SC70
Top View
NC
SN74AUC1G04
SCES370R – SEPTEMBER 2001 – REVISED JUNE 2017
DRL Package
5-Pin SOT-5X3
Top View
NC
DRY Package
6-Pin SON
Top View
NC 1
A2
GND 3
6 VCC
5 NC
4Y
See mechanical drawings for dimensions.
NC – No internal connection
DNU – Do not use
PIN
NAME
DBV, DCK,
DRL
DRY
YZP
A
2
2
B1
DNU
A1
GND
3
3
C1
1
NC
1
5
VCC
5
6
A2
Y
4
4
C2
YZP Package
5-Pin DSBGA
Bottom View
1
2
C
GND
Y
B
A
A
DNU
VCC
Not to scale
Pin Functions
I/O
I
A logic input
Do not use
Ground
No internal connection
Positive supply
O
Y inverted output
DESCRIPTION
Copyright © 2001–2017, Texas Instruments Incorporated
Product Folder Links: SN74AUC1G04
Submit Documentation Feedback
3



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