DatasheetsPDF.com

SCHMITT-TRIGGER INVERTER. SN74AUC14 Datasheet

DatasheetsPDF.com

SCHMITT-TRIGGER INVERTER. SN74AUC14 Datasheet






SN74AUC14 INVERTER. Datasheet pdf. Equivalent




SN74AUC14 INVERTER. Datasheet pdf. Equivalent





Part

SN74AUC14

Description

HEX SCHMITT-TRIGGER INVERTER



Feature


SN74AUC14 www.ti.com SCES473A – AUGU ST 2003 – REVISED MAY 2010 HEX SCHMIT T-TRIGGER INVERTER Check for Samples: S N74AUC14 FEATURES 1 • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolera nt to Support Mixed-Mode Signal Operati on • Ioff Supports Partial-Power-Down Mode Operation • Sub-1-V Operable Max tpd of 2 ns at 1.8 V • Low Powe r Consumption, 10-mA Max ICC • ±.
Manufacture

Texas Instruments

Datasheet
Download SN74AUC14 Datasheet


Texas Instruments SN74AUC14

SN74AUC14; 8-mA Output Drive at 1.8 V • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JE SD 22 – 2000-V Human-Body Model (A114 -A) – 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101) G ND RGY PACKAGE (TOP VIEW) VCC 1A 1 1Y 2 2A 3 2Y 4 3A 5 3Y 6 7 14 13 6A 12 6Y 11 5A 10 5Y 9 4A 8 4Y DESCRIPTION /ORDERING INFORMATION This h.


Texas Instruments SN74AUC14

ex Schmitt-trigger inverter is operation al at 0.8-V to 2.7-V VCC, but is design ed specifically for 1.65-V to 1.95-V VC C operation. The SN74AUC14 contains six independent inverters and performs the Boolean function Y = A. The device fun ctions as six independent inverters, bu t because of Schmitt action, it may hav e different input threshold levels for positive-going (VT.


Texas Instruments SN74AUC14

+) and negative-going (VT–) signals. T his device is fully specified for parti al-power-down applications using Ioff. The Ioff circuitry disables the outputs , preventing damaging current backflow through the device when it is powered d own. TA –40°C to 85°C QFN – RGY ORDERING INFORMATION(1) PACKAGE (2) ORDERABLE PART NUMBER Tape and reel SN74AUC14RGYR TOP-SIDE MA.

Part

SN74AUC14

Description

HEX SCHMITT-TRIGGER INVERTER



Feature


SN74AUC14 www.ti.com SCES473A – AUGU ST 2003 – REVISED MAY 2010 HEX SCHMIT T-TRIGGER INVERTER Check for Samples: S N74AUC14 FEATURES 1 • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolera nt to Support Mixed-Mode Signal Operati on • Ioff Supports Partial-Power-Down Mode Operation • Sub-1-V Operable Max tpd of 2 ns at 1.8 V • Low Powe r Consumption, 10-mA Max ICC • ±.
Manufacture

Texas Instruments

Datasheet
Download SN74AUC14 Datasheet




 SN74AUC14
SN74AUC14
www.ti.com
SCES473A – AUGUST 2003 – REVISED MAY 2010
HEX SCHMITT-TRIGGER INVERTER
Check for Samples: SN74AUC14
FEATURES
1
• Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
• Ioff Supports Partial-Power-Down Mode
Operation
• Sub-1-V Operable
• Max tpd of 2 ns at 1.8 V
• Low Power Consumption, 10-mA Max ICC
• ±8-mA Output Drive at 1.8 V
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
RGY PACKAGE
(TOP VIEW)
1
1Y 2
2A 3
2Y 4
3A 5
3Y 6
7
14
13 6A
12 6Y
11 5A
10 5Y
9 4A
8
DESCRIPTION/ORDERING INFORMATION
This hex Schmitt-trigger inverter is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to
1.95-V VCC operation.
The SN74AUC14 contains six independent inverters and performs the Boolean function Y = A. The device
functions as six independent inverters, but because of Schmitt action, it may have different input threshold levels
for positive-going (VT+) and negative-going (VT–) signals.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
TA
–40°C to 85°C
QFN – RGY
ORDERING INFORMATION(1)
PACKAGE (2)
ORDERABLE PART NUMBER
Tape and reel
SN74AUC14RGYR
TOP-SIDE MARKING
MS14
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
FUNCTION TABLE
(EACH INVERTER)
INPUT
A
OUTPUT
Y
H
L
L
H
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2010, Texas Instruments Incorporated




 SN74AUC14
SN74AUC14
SCES473A – AUGUST 2003 – REVISED MAY 2010
LOGIC DIAGRAM, EACH INVERTER
(POSITIVE LOGIC)
A
Y
www.ti.com
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
VCC Supply voltage range
VI
Input voltage range(2)
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
VO
Output voltage range(2)
IIK
Input clamp current
VI < 0
IOK Output clamp current
VO < 0
IO
Continuous output current
Continuous current through VCC or GND
qJA
Package thermal impedance(3)
Tstg Storage temperature range
–0.5
3.6 V
–0.5
3.6 V
–0.5
3.6 V
–0.5 VCC + 0.5
V
–50 mA
–50 mA
±20 mA
±100 mA
47 °C/W
–65
150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-5.
Recommended Operating Conditions(1)
MIN MAX UNIT
VCC
Supply voltage
VI
Input voltage
VO
Output voltage
IOH
High-level output current
IOL
Low-level output current
TA
Operating free-air temperature
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
0.8 2.7 V
0 3.6 V
0 VCC
V
–0.7
–3
–5 mA
–8
–9
0.7
3
5 mA
8
9
–40
85 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
Submit Documentation Feedback
Copyright © 2003–2010, Texas Instruments Incorporated
Product Folder Link(s): SN74AUC14




 SN74AUC14
SN74AUC14
www.ti.com
SCES473A – AUGUST 2003 – REVISED MAY 2010
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
0.8 V
1.1 V
VT+ Positive-going input threshold voltage
1.4 V
1.65 V
2.3 V
0.8 V
1.1 V
VT– Negative-going input threshold voltage
1.4 V
1.65 V
2.3 V
0.8 V
1.1 V
ΔVT Hysteresis (VT+ – VT–)
1.4 V
1.65 V
2.3 V
VOH High-level output voltage
VOL Low-level output voltage
II
A inputs
Ioff
ICC
Ci
IOH = –100 mA
IOH = –0.7 mA
IOH = –3 mA
IOH = –5 mA
IOH = –8 mA
IOH = –9 mA
IOL = 100 mA
IOL = 0.7 mA
IOL = 3 mA
IOL = 5 mA
IOL = 8 mA
IOL = 9 mA
VI = VCC or GND
VI or VO = 2.7 V
VI = VCC or GND,
VI = VCC or GND
IO = 0
0.8 V to 2.7 V
0.8 V
1.1 V
1.4 V
1.65 V
2.3 V
0.8 V to 2.7 V
0.8 V
1.1 V
1.4 V
1.65 V
2.3 V
0 to 2.7 V
0
0.8 V to 2.7 V
2.5 V
(1) All typical values are at TA = 25°C.
MIN TYP(1)
0.5
0.51
0.65
0.79
1.11
0.3
0.22
0.3
0.39
0.58
0.21
0.25
0.31
0.37
0.48
VCC – 0.1
0.55
0.8
1
1.2
1.8
0.25
2.5
MAX
0.86
1
1.16
1.56
0.53
0.58
0.62
0.87
0.38
0.5
0.62
0.77
0.2
0.3
0.4
0.45
0.6
±5
±10
10
UNIT
V
V
V
V
V
mA
mA
mA
pF
Copyright © 2003–2010, Texas Instruments Incorporated
Product Folder Link(s): SN74AUC14
Submit Documentation Feedback
3



Recommended third-party SN74AUC14 Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)