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OCTAL BUFFER/DRIVER. SN74AUCH244 Datasheet

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OCTAL BUFFER/DRIVER. SN74AUCH244 Datasheet






SN74AUCH244 BUFFER/DRIVER. Datasheet pdf. Equivalent




SN74AUCH244 BUFFER/DRIVER. Datasheet pdf. Equivalent





Part

SN74AUCH244

Description

OCTAL BUFFER/DRIVER



Feature


D Optimized for 1.8-V Operation and is 3 .6-V I/O Tolerant to Support Mixed-Mode Signal Operation D Ioff Supports Parti al-Power-Down Mode Operation D Sub 1-V Operable D Max tpd of 1.9 ns at 1.8 V D Low Power Consumption, 20-µA Max ICC D ±8-mA Output Drive at 1.8 V D Bus Ho ld on Data Inputs Eliminates the Need f or External Pullup/Pulldown Resistors D Latch-Up Performanc.
Manufacture

Texas Instruments

Datasheet
Download SN74AUCH244 Datasheet


Texas Instruments SN74AUCH244

SN74AUCH244; e Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds JESD 22 − 200 0-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Char ged-Device Model (C101) GND 2A1 SN74A UCH244 OCTAL BUFFER/DRIVER WITH 3ĆSTAT E OUTPUTS SCES433 − MARCH 2003 RGY PA CKAGE (TOP VIEW) 1OE VCC 1 1A1 2 2Y4 3 1A2 4 2Y3 5 1A3 6 2Y2 7 1A4 8 2Y1 9 1 0 20 19 2OE 18 1Y1 17 2A4 .


Texas Instruments SN74AUCH244

16 1Y2 15 2A3 14 1Y3 13 2A2 12 1Y4 11 d escription/ordering information This oc tal buffer/driver is operational at 0.8 -V to 2.7-V VCC, but is designed specif ically for 1.65-V to 1.95-V VCC operati on. The SN74AUCH244 is organized as two 4-bit line drivers with separate outpu t-enable (OE) inputs. When OE is low, t he device passes data from the A inputs to the Y outputs..


Texas Instruments SN74AUCH244

When OE is high, the outputs are in the high-impedance state. To ensure the hi gh-impedance state during power up or p ower down, OE should be tied to VCC thr ough a pullup resistor; the minimum val ue of the resistor is determined by the current-sinking capability of the driv er. Active bus-hold circuitry holds unu sed or undriven inputs at a valid logic state. Use of pul.

Part

SN74AUCH244

Description

OCTAL BUFFER/DRIVER



Feature


D Optimized for 1.8-V Operation and is 3 .6-V I/O Tolerant to Support Mixed-Mode Signal Operation D Ioff Supports Parti al-Power-Down Mode Operation D Sub 1-V Operable D Max tpd of 1.9 ns at 1.8 V D Low Power Consumption, 20-µA Max ICC D ±8-mA Output Drive at 1.8 V D Bus Ho ld on Data Inputs Eliminates the Need f or External Pullup/Pulldown Resistors D Latch-Up Performanc.
Manufacture

Texas Instruments

Datasheet
Download SN74AUCH244 Datasheet




 SN74AUCH244
D Optimized for 1.8-V Operation and is 3.6-V
I/O Tolerant to Support Mixed-Mode Signal
Operation
D Ioff Supports Partial-Power-Down Mode
Operation
D Sub 1-V Operable
D Max tpd of 1.9 ns at 1.8 V
D Low Power Consumption, 20-µA Max ICC
D ±8-mA Output Drive at 1.8 V
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
SN74AUCH244
OCTAL BUFFER/DRIVER
WITH 3ĆSTATE OUTPUTS
SCES433 − MARCH 2003
RGY PACKAGE
(TOP VIEW)
1
1A1 2
2Y4 3
1A2 4
2Y3 5
1A3 6
2Y2 7
1A4 8
2Y1 9
10
20
19 2OE
18 1Y1
17 2A4
16 1Y2
15 2A3
14 1Y3
13 2A2
12 1Y4
11
description/ordering information
This octal buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC
operation.
The SN74AUCH244 is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE
is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 85°C QFN − RGY
Tape and reel SN74AUCH244RGYR
MT244
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
1




 SN74AUCH244
SN74AUCH244
OCTAL BUFFER/DRIVER
WITH 3ĆSTATE OUTPUTS
SCES433 − MARCH 2003
logic diagram (positive logic)
1
1OE
2
1A1
FUNCTION TABLE
(each 4-bit buffer/driver)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
18
1Y1
19
2OE
11
2A1
9
2Y1
1A2 4
16 1Y2
2A2 13
7 2Y2
6
1A3
14 1Y3
15
2A3
5 2Y3
8
1A4
12 1Y4
17
2A4
3 2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 2): . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-5.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265




 SN74AUCH244
SN74AUCH244
OCTAL BUFFER/DRIVER
WITH 3ĆSTATE OUTPUTS
SCES433 − MARCH 2003
recommended operating conditions (see Note 3)
MIN
MAX
UNIT
VCC Supply voltage
VIH High-level input voltage
VIL
Low-level input voltage
VI
Input voltage
VO
Output voltage
VCC = 0.8 V
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 0.8 V
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
Active state
3-state
0.8
2.7
V
VCC
0.65 × VCC
V
1.7
0
0.35 × VCC V
0.7
0
3.6
V
0
VCC
V
0
3.6
IOH High-level output current
IOL
Low-level output current
t/v Input transition rise or fall rate
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
−0.7
−3
−5
mA
−8
−9
0.7
3
5
mA
8
9
20
ns/V
TA
Operating free-air temperature
−40
85
°C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3



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