32-BIT BUFFER/DRIVER
www.ti.com
FEATURES
• Member of the Texas Instruments Widebus+™ Family
• Optimized for 1.8-V Operation and Is 3.6-V I/O ...
Description
www.ti.com
FEATURES
Member of the Texas Instruments Widebus+™ Family
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
Ioff Supports Partial-Power-Down Mode Operation
Sub-1-V Operable Max tpd of 1.8 ns at 1.8 V
SN74AUCH32244 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCES412B – SEPTEMBER 2002 – REVISED JUNE 2005
Low Power Consumption, 40-µA Max ICC ±8-mA Output Drive at 1.8 V Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This 32-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUCH32244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused...
Similar Datasheet