Document
CD74HC7266, CD54HC7266
SCHS219E – NOVEMBER 1998 – REVISED JUNE 2021
CDx4HC7266 Quadruple 2-Input XNOR Gates
1 Features
3 Description
• Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range:
-55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL
logic ICs
2 Applications
• Detect phase differences in input signals • Create a selectable inverter / buffer
This device contains four independent 2-input XNOR gates. Each gate performs the Boolean function Y = A ⊕ B in positive logic.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
CD74HC7266M
SOIC (14)
8.70 mm × 3.90 mm
CD74HC7266E
PDIP (14)
19.30 mm × 6.40 mm
CD54HC7266F
CDIP (14)
21.30 mm × 7.60 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
1 1A
2 1B
3 1Y
4 2Y
5 2A
6 2B
7 GND
14 VCC
13 4B
12 4A
11 4Y
10 3Y
9 3B
8 3A
Functional pinout
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
CD74HC7266, CD54HC7266
SCHS219E – NOVEMBER 1998 – REVISED JUNE 2021
www.ti.com
Table of Contents
1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3
Pin Functions.................................................................... 3 6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4 6.2 Recommended Operating Conditions.........................4 6.3 Thermal Information....................................................4 6.4 Electrical Characteristics.............................................5 6.5 Switching Characteristics............................................5 6.6 Operating Characteristics........................................... 6 6.7 Typical Characteristics................................................ 6 7 Parameter Measurement Information............................ 7 8 Detailed Description........................................................8 8.1 Overview..................................................................... 8 8.2 Functional Block Diagram........................................... 8
8.3 Feature Description.....................................................8 8.4 Device Functional Modes............................................9 9 Application and Implementation.................................. 10 9.1 Application Information............................................. 10 9.2 Typical Application.................................................... 10 10 Power Supply Recommendations..............................12 11 Layout........................................................................... 13 11.1 Layout Guidelines................................................... 13 11.2 Layout Example...................................................... 13 12 Device and Documentation Support..........................14 12.1 Documentation Support.......................................... 14 12.2 Support Resources................................................. 14 12.3 Trademarks............................................................. 14 12.4 Electrostatic Discharge Caution..............................14 12.5 Glossary..................................................................14 13 Mechanical, Packaging, and Orderable Information.................................................................... 14
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (September 2003) to Revision E (June 2021)
Page
• Updated to new data sheet standards................................................................................................................ 1
• RθJA increased for the D package (86 to 133.6 ℃/W) and decreased for the N package (80 to 64.8 ℃/W)......4
2
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5 Pin Configuration and Functions
CD74HC7266, CD54HC7266
SCHS219E – NOVEMBER 1998 – REVISED JUNE 2021
Pin Functions
NAME 1A 1B 1Y 2Y 2A 2B GND 3A 3B 3Y 4Y 4A 4B VCC
PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14
1A
1
1B
2
1Y
3
2Y
4
2A
5
2B
6
GND
7
14
VCC
13
4B
12
4A
11
4Y
10
3Y
9
3B
8
3A
D, N, or J Package 14-Pin SOIC, PDIP, or CDIP
Top View
I/O
Input Input Output Output Input Input
— Input Input Output Output Input Inpu.