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PWM Controllers. UCD8220 Datasheet

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PWM Controllers. UCD8220 Datasheet
















UCD8220 Controllers. Datasheet pdf. Equivalent













Part

UCD8220

Description

Digitally Managed Push-Pull Analog PWM Controllers



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity UCD8220 SLUS652E – MARCH 2005 – REVISED APRIL 2020 UCD8220 Digital ly Managed Push-Pull Analog PWM Control lers 1 Features •1 For digitally man aged power supplies using μCs or the T MS320 ™ DSP family • Voltage or pea k current mode control with cycleby-cyc le current limiting • Clock i.
Manufacture

Texas Instruments

Datasheet
Download UCD8220 Datasheet


Texas Instruments UCD8220

UCD8220; nput from digital controller to set oper ating frequency and max duty cycle • Analog PWM comparator • 2-MHz switchi ng frequency • 110-V input startup ci rcuit and thermal shutdown (UCD8620) Internal programmable slope compensat ion • 3.3-V, 10-mA linear regulator DSP/μC compatible inputs • Dual 4-A TrueDrive™ integrated circuit hi gh current drivers • 10-ns typical r.


Texas Instruments UCD8220

ise and fall times with 2.2-nF • 25-ns input-to-output propagation delay • 25-ns current sense-to-output propagati on delay • Programmable current-limit threshold • Digital output current-l imit flag • 4.5-V to 15.5-V supply vo ltage range • Rated from –40°C to 105°C 2 Applications • Digitally man aged switch mode power supplies • Pus h-pull, half-bridge, or full-bridge co.


Texas Instruments UCD8220

nverters • Battery chargers Systems u sing the UCD8220 device close the PWM f eedback loop with traditional analog me thods, but the UCD8220 controller inclu des circuitry to interpret a time-domai n digital pulse train. The pulse train contains the operating frequency and ma ximum duty cycle limit which are used t o control the power supply operation. T he device circuitry .





Part

UCD8220

Description

Digitally Managed Push-Pull Analog PWM Controllers



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity UCD8220 SLUS652E – MARCH 2005 – REVISED APRIL 2020 UCD8220 Digital ly Managed Push-Pull Analog PWM Control lers 1 Features •1 For digitally man aged power supplies using μCs or the T MS320 ™ DSP family • Voltage or pea k current mode control with cycleby-cyc le current limiting • Clock i.
Manufacture

Texas Instruments

Datasheet
Download UCD8220 Datasheet




 UCD8220
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Order
Now
Technical
Documents
Tools &
Software
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UCD8220
SLUS652E – MARCH 2005 – REVISED APRIL 2020
UCD8220 Digitally Managed Push-Pull Analog PWM Controllers
1 Features
1 For digitally managed power supplies using μCs
or the TMS320 ™ DSP family
• Voltage or peak current mode control with cycle-
by-cycle current limiting
• Clock input from digital controller to set operating
frequency and max duty cycle
• Analog PWM comparator
• 2-MHz switching frequency
• 110-V input startup circuit and thermal shutdown
(UCD8620)
• Internal programmable slope compensation
• 3.3-V, 10-mA linear regulator
• DSP/μC compatible inputs
• Dual ±4-A TrueDrive™ integrated circuit high
current drivers
• 10-ns typical rise and fall times with 2.2-nF
• 25-ns input-to-output propagation delay
• 25-ns current sense-to-output propagation delay
• Programmable current-limit threshold
• Digital output current-limit flag
• 4.5-V to 15.5-V supply voltage range
• Rated from –40°C to 105°C
2 Applications
• Digitally managed switch mode power supplies
• Push-pull, half-bridge, or full-bridge converters
• Battery chargers
Systems using the UCD8220 device close the PWM
feedback loop with traditional analog methods, but
the UCD8220 controller includes circuitry to interpret
a time-domain digital pulse train. The pulse train
contains the operating frequency and maximum duty
cycle limit which are used to control the power supply
operation. The device circuitry eases implementation
of a converter with high level control features without
the added complexity or possible PWM resolution
limitations of closing the control loop in the discrete
time domain.
The UCD8220 device can be configured for either
peak current mode or voltage mode control. The
device provides a programmable current-limit function
and a digital output current-limit flag which can be
monitored by the host controller to set the current
limit operation. For fast switching speeds, the output
stage uses the TrueDrive output circuit architecture,
which delivers rated current of ±4-A into the gate of a
MOSFET. Finally the device also includes a 3.3-V,
10-mA linear regulator to provide power to the digital
controller or act as a reference in the system.
The UCD8220 controller is compatible with the
standard 3.3-V I/O ports of UCD9K digital power
controllers, DSPs, microcontrollers, or ASICs and is
offered in the PowerPAD™ integrated circuit package
HTSSOP.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
UCD8220
HTSSOP (16)
5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
3 Description
The UCD8220 analog pulse-width modulator (PWM)
device is used in digitally managed power supplies
using a microcontroller or the TMS320 DSP family.
The UCD8220 device is a double-ended PWM
controller configured with push-pull drive logic.
Figure 1. UCD8220 Typical Simplified Push-Pull
Converter Application Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




 UCD8220
UCD8220
SLUS652E – MARCH 2005 – REVISED APRIL 2020
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Timing Requirements ................................................ 6
6.7 Typical Characteristics .............................................. 7
7 Detailed Description ............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagram ....................................... 13
7.3 Feature Description................................................. 13
7.4 Device Functional Modes........................................ 17
8 Application and Implementation ........................ 18
8.1 Application Information............................................ 18
8.2 Typical Application ................................................. 18
9 Power Supply Recommendations...................... 22
10 Layout................................................................... 23
10.1 Layout Guidelines ................................................. 23
10.2 Layout Example .................................................... 23
10.3 Thermal Considerations ........................................ 24
11 Device and Documentation Support ................. 24
11.1 Documentation Support ........................................ 24
11.2 Trademarks ........................................................... 24
11.3 Electrostatic Discharge Caution ............................ 24
11.4 Glossary ................................................................ 24
12 Mechanical, Packaging, and Orderable
Information ........................................................... 24
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (October 2006) to Revision E
Page
• Added the following sections to the data sheet: Device Functional Modes, Application Information, Design
Requirements, Application Curves, Power Supply Recommendations, and Layout Example............................................... 1
• Changed Updated ESD table ................................................................................................................................................ 4
• Changed Junction temperature to 105 Celsius ...................................................................................................................... 5
• Changed Junction temperature to 105 Celsius ...................................................................................................................... 6
• Added Layout example for Industrial version ...................................................................................................................... 23
2
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Copyright © 2005–2020, Texas Instruments Incorporated




 UCD8220
www.ti.com
5 Pin Configuration and Functions
UCD8220
SLUS652E – MARCH 2005 – REVISED APRIL 2020
PWP Package
16-Pin HTSSOP With PowerPAD
Top View
NC
1
CLK
2
3V3
3
ISET
4
AGND
5
CTRL
6
CLF
7
ILIM
8
16
NC
15
NC
14
VDD
13
PVDD
12
OUT1
11
OUT2
10
PGND
9
CS
NC – No internal connection
PIN
NAME
NO.
3V3
3
AGND
5
CLF
7
CLK
2
CS
9
CTRL
6
ILIM
8
ISET
4
1
NC
15
16
OUT1
12
OUT2
11
PGND
10
PVDD
13
VDD
14
Pin Functions
I/O
DESCRIPTION
O
Regulated 3.3-V rail. The onboard linear voltage regulator is capable of sourcing up to 10 mA of
current. Place a 0.22-μF ceramic capacitor from this pin to analog ground.
— Analog ground return
Current-limit flag. When the CS level is greater than the ILIM voltage minus 25 mV, the output
O
driver is forced low and the current-limit flag (CLF) is set high. The CLF signal is latched high until
the device receives the next rising edge on the CLK pin. This signal is also used for the start-up
handshaking between the digital controller and the analog controller
Clock. Input pulse train contains operating frequency and maximum duty cycle limit. This pin is a
I high impedance digital input capable of accepting 3.3-V logic level signals up to 2 MHz. An internal
Schmitt trigger comparator isolates the internal circuitry from any external noise.
I
Current sense pin. A fast current-limit comparator connected to the CS pin is used to protect the
power stage by implementing cycle-by-cycle current limiting.
I
Input for the error feedback voltage from the external error amplifier. This input is multiplied by 0.5
and routed to the negative input of the PWM comparator
I
Current-limit threshold set pin. The current-limit threshold can be set to any value between 0.25 V
and 1 V. The default value while open is 0.5 V.
I
Pin for programming the current used to set the amount of slope compensation in peak current-
mode control or to set the internal capacitor charging in voltage-mode control.
— No connection.
O The high-current TrueDrive integrated circuit driver output.
O The high-current TrueDrive integrated circuit driver output.
— Power ground return. This pin should be connected close to the source of the power MOSFET.
— Supply pin provides power for the output drivers. This pin is not connected internally to the VDD
supply rail. The bypass capacitor for this pin should be returned to PGND.
I
Supply input pin to power the control circuitry. Bypass the pin with a capacitor with a value of at
least 4.7 μF, returned to AGND.
Copyright © 2005–2020, Texas Instruments Incorporated
Product Folder Links: UCD8220
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