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Power-Supply Sequencer/Monitor. UCD90124A Datasheet

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Power-Supply Sequencer/Monitor. UCD90124A Datasheet
















UCD90124A Sequencer/Monitor. Datasheet pdf. Equivalent













Part

UCD90124A

Description

12-Rail Power-Supply Sequencer/Monitor



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity UCD90124A SLVSAN8A – JANUARY 2012 – REVISED FEBRUARY 2020 UCD90124 A 12-Rail Power Supply Sequencer and Mo nitor with ACPI Support and Fan Control " 1 Features •1 Monitor and sequence 12 voltage rails – All rails sampled every 400 μs – 12-bit ADC with 2.5- V, 0.5% internal VREF – Seque.
Manufacture

Texas Instruments

Datasheet
Download UCD90124A Datasheet


Texas Instruments UCD90124A

UCD90124A; nce based on time, rail and pin dependen cies – Four programmable undervoltage and overvoltage thresholds per monitor • Nonvolatile error and peak-value l ogging per monitor (up to 12 fault deta il entries) • Closed-loop margining f or 10 Rails – Margin output adjusts r ail voltage to match user-defined margi n thresholds • Programmable watchdog timer and system reset • Fle.


Texas Instruments UCD90124A

xible digital I/O configuration • Pin- selected rail states • Multiphase PWM clock generator – Clock frequencies from 15.259 kHz to 125 MHz – Capabili ty to configure independent clock outpu ts for synchronizing switch-mode power supplies • JTAG and I2C/SMBus/PMBus interfaces • Fan control and monito ring system functions. – Supports fou r fans with five user-defined spee.


Texas Instruments UCD90124A

d-vs-temperature setpoints – Supports two-, three-, and four-wire fans 2 Appl ications • Industrial ATE • Telecom munications and networking equipment Servers and storage systems • Any s ystem requiring sequencing and monitori ng of multiple power rails 3 Descripti on The UCD90124A is a 12-rail PMBus/I2C addressable power-supply sequencer and monitor. The device integra.





Part

UCD90124A

Description

12-Rail Power-Supply Sequencer/Monitor



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity UCD90124A SLVSAN8A – JANUARY 2012 – REVISED FEBRUARY 2020 UCD90124 A 12-Rail Power Supply Sequencer and Mo nitor with ACPI Support and Fan Control " 1 Features •1 Monitor and sequence 12 voltage rails – All rails sampled every 400 μs – 12-bit ADC with 2.5- V, 0.5% internal VREF – Seque.
Manufacture

Texas Instruments

Datasheet
Download UCD90124A Datasheet




 UCD90124A
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
UCD90124A
SLVSAN8A – JANUARY 2012 – REVISED FEBRUARY 2020
UCD90124A 12-Rail Power Supply Sequencer and Monitor with ACPI Support and Fan
Control"
1 Features
1 Monitor and sequence 12 voltage rails
– All rails sampled every 400 μs
– 12-bit ADC with 2.5-V, 0.5% internal VREF
– Sequence based on time, rail and pin
dependencies
– Four programmable undervoltage and
overvoltage thresholds per monitor
• Nonvolatile error and peak-value logging per
monitor (up to 12 fault detail entries)
• Closed-loop margining for 10 Rails
– Margin output adjusts rail voltage to match
user-defined margin thresholds
• Programmable watchdog timer and system reset
• Flexible digital I/O configuration
• Pin-selected rail states
• Multiphase PWM clock generator
– Clock frequencies from 15.259 kHz to
125 MHz
– Capability to configure independent clock
outputs for synchronizing switch-mode power
supplies
• JTAG and I2C/SMBus/PMBus™ interfaces
• Fan control and monitoring system functions.
– Supports four fans with five user-defined
speed-vs-temperature setpoints
– Supports two-, three-, and four-wire fans
2 Applications
• Industrial ATE
• Telecommunications and networking equipment
• Servers and storage systems
• Any system requiring sequencing and monitoring
of multiple power rails
3 Description
The UCD90124A is a 12-rail PMBus/I2C addressable
power-supply sequencer and monitor. The device
integrates a 12-bit ADC for monitoring up to 12
power-supply voltage inputs. Twenty-six GPIO pins
can be used for power supply enables, power-on
reset signals, external interrupts, cascading, or other
system functions. Twelve of these pins offer PWM
functionality. Using these pins, the UCD90124A offers
support for fan control, margining, and general-
purpose PWM functions.
Specific power states can be achieved using the Pin-
Selected Rail States feature. This feature allows with
the use of up to 3 GPIs to enable and disable any
rail. This is useful for implementing system low-power
modes and the Advanced Configuration and Power
Interface (ACPI) specification that is used for
hardware devices.
The TI Fusion Digital Power™ designer software is
provided for device configuration. This PC-based
graphical user interface (GUI) offers an intuitive
interface for configuring, storing, and monitoring all
system operating parameters.
PART NUMBER
UCD90124A
Device Information(1)
PACKAGE
BODY SIZE (NOM)
VQFN (64)
9.00 mm × 9.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
12V
I12V
INA196
12V OUT
3.3V OUT
1.8V OUT
0.8V OUT
I0.8V
TEMP0.8V
I12V
TEMP12V
WDI from main
processor
WDO
POWER_GOOD
WARN_OC_0.8V_
OR_12V
SYSTEM RESET
OTHER
SEQUENCER DONE
(CASCADE INPUT)
3.3V_UCD
5.1V
12V OUT
TEMP12V
TEMP IC
VMON
VMON
VMON
VMON
VMON
VMON
VMON
VMON
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
UCD90124A
I2C/
PMBUS
GPIO
GPIO
VIN
VOUT
/EN
DC-DC 1
VFB
3.3V OUT
GPIO
VIN
/EN VOUT
LDO1
1.8V OUT
GPIO
2MHz
PWM
TEMP0.8V
TEMP IC
VIN
VOUT
/EN
DC-DC 2
VFB
0.8V OUT
I0.8V
INA196
Vmarg
Closed Loop
Margining
12 V
4- wire Fan
PWM
25 kHz Fan PWM
12V
PWM
JTAG
GPIO
Fan Tach
TACH
GND
DC Fan
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




 UCD90124A
UCD90124A
SLVSAN8A – JANUARY 2012 – REVISED FEBRUARY 2020
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 7
7 Absolute Maximum Ratings.................................. 7
8 ESD Ratings ........................................................... 7
9 Recommended Operating Conditions ................. 7
10 Thermal Information.............................................. 7
11 Electrical Characteristics ..................................... 9
12 I2C/SMBus/PMBus Timing Requirements ........ 10
12.1 Typical Characteristics .......................................... 11
13 Detailed Description ........................................... 12
13.1 Overview ............................................................... 12
13.2 Functional Block Diagram ..................................... 18
13.3 Feature Description............................................... 18
13.4 Device Functional Modes...................................... 18
13.5 Programming......................................................... 42
14 Application and Implementation........................ 47
14.1 Application Information.......................................... 47
14.2 Typical Application ............................................... 47
15 Power Supply Recommendations ..................... 50
16 Layout................................................................... 50
16.1 Layout Guidelines ................................................. 50
16.2 Layout Example .................................................... 50
17 Device and Documentation Support ................. 52
17.1 Device Support...................................................... 52
17.2 Documentation Support ........................................ 52
17.3 Support Resources ............................................... 52
17.4 Trademarks ........................................................... 52
17.5 Electrostatic Discharge Caution ............................ 52
17.6 Glossary ................................................................ 52
18 Mechanical, Packaging, and Orderable
Information ........................................................... 52
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (January 2012) to Revision A
Page
• Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section ..................................... 1
• Added fan control to the feature list ...................................................................................................................................... 1
• Changed 0 V to 0.2 V for MON10 through MON13................................................................................................................ 5
• Changed Tinternal to Tempinternal in the Electrical Characteristics ............................................................................................ 9
• Added footnote Characterized by design and not production tested. .................................................................................... 9
• Added footnote The maximum high/low temperature values are not production tested. ...................................................... 9
• Changed Timing requirements table (tf) from: See (Note Rise Time) To: See (Note Fall Time) ......................................... 10
• Changed Timing requirements table (tf) from: See (Note Fall Time) To: See (Note Rise Time) ........................................ 10
• Added GPIO 1/2/3/4/13/16/17/18 pins shall not be configured to enable the low latency feature. Otherwise the
functions of associated logical controlled GPOs may malfunction. For example, GPIO13 is the fifth one among those
8 pins. If configured as the fifth GPI, the low latency feature is enabled, otherwise it is disabled....................................... 48
2
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Copyright © 2012–2020, Texas Instruments Incorporated




 UCD90124A
www.ti.com
5 Pin Configuration and Functions
UCD90124A
SLVSAN8A – JANUARY 2012 – REVISED FEBRUARY 2020
RGC Package with Thermal Pad
64-Pin VQFN
Top View
MON1 1
MON2 2
MON3 3
MON4 4
MON5 5
MON6 6
V33DIO1 7
DVSS1 8
RESET 9
TRCK 10
GPIO1 11
GPIO2 12
GPIO3 13
GPIO4 14
PMBUS_CLK 15
PMBUS_DATA 16
48 AVSS2
47 BPCAP
46 V33A
45 V33D
44 V33DIO2
43 DVSS3
42 PWM3/GPI3
41 PWM4/GPI4
40 TRST
39 TMS/GPIO22
38
TDI/
GPIO21
37 TDO/GPIO20
36 TCK/GPIO19
35 GPIO18
34 GPIO17
33 GPIO16
Copyright © 2012–2020, Texas Instruments Incorporated
Product Folder Links: UCD90124A
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