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Power-Supply Sequencer/Monitor. UCD90160 Datasheet

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Power-Supply Sequencer/Monitor. UCD90160 Datasheet
















UCD90160 Sequencer/Monitor. Datasheet pdf. Equivalent













Part

UCD90160

Description

16-Rail Power-Supply Sequencer/Monitor



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity UCD90160 SLVSAC8D – NOVEMBER 2010 – REVISED APRIL 2019 UCD90160 16 -Rail Power Supply Sequencer and Monito r with ACPI Support 1 Features •1 Mo nitor and sequence 16 voltage rails – All rails sampled every 400 μs – 12 -bit ADC with 2.5-V, 0.5% internal VREF – Sequence based on time, ra.
Manufacture

Texas Instruments

Datasheet
Download UCD90160 Datasheet


Texas Instruments UCD90160

UCD90160; il and pin dependencies – Four program mable undervoltage and overvoltage thre sholds per monitor • Nonvolatile erro r and peak-value logging per monitor (u p to 12 fault detail entries) • Close d-loop margining for 10 rails – Margi n output adjusts rail voltage to match user-defined margin thresholds • Prog rammable watchdog timer and system rese t • Pin selected rail states.


Texas Instruments UCD90160

for ACPI support • Flexible digital I /O configuration • Multiphase PWM clo ck generator – Clock frequencies from 15.259 kHz to 125 MHz – Capability t o configure independent clock outputs f or synchronizing switch-mode power supp lies • JTAG and I2C/SMBus/PMBus™ in terfaces Specific power states can be achieved using the PinSelected Rail Sta tes feature. This feature allo.


Texas Instruments UCD90160

ws with the use of up to 3 GPIs to enabl e and disable any rail. This is useful for implementing system low-power modes and the Advanced Configuration and Pow er Interface (ACPI) specification that is used for hardware devices. The TI Fu sion Digital Power™ designer software is provided for device configuration. This PC-based graphical user interface (GUI) offers an intu.





Part

UCD90160

Description

16-Rail Power-Supply Sequencer/Monitor



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity UCD90160 SLVSAC8D – NOVEMBER 2010 – REVISED APRIL 2019 UCD90160 16 -Rail Power Supply Sequencer and Monito r with ACPI Support 1 Features •1 Mo nitor and sequence 16 voltage rails – All rails sampled every 400 μs – 12 -bit ADC with 2.5-V, 0.5% internal VREF – Sequence based on time, ra.
Manufacture

Texas Instruments

Datasheet
Download UCD90160 Datasheet




 UCD90160
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
UCD90160
SLVSAC8D – NOVEMBER 2010 – REVISED APRIL 2019
UCD90160 16-Rail Power Supply Sequencer and Monitor with ACPI Support
1 Features
1 Monitor and sequence 16 voltage rails
– All rails sampled every 400 μs
– 12-bit ADC with 2.5-V, 0.5% internal VREF
– Sequence based on time, rail and pin
dependencies
– Four programmable undervoltage and
overvoltage thresholds per monitor
• Nonvolatile error and peak-value logging per
monitor (up to 12 fault detail entries)
• Closed-loop margining for 10 rails
– Margin output adjusts rail voltage to match
user-defined margin thresholds
• Programmable watchdog timer and system reset
• Pin selected rail states for ACPI support
• Flexible digital I/O configuration
• Multiphase PWM clock generator
– Clock frequencies from 15.259 kHz to 125
MHz
– Capability to configure independent clock
outputs for synchronizing switch-mode power
supplies
• JTAG and I2C/SMBus/PMBus™ interfaces
Specific power states can be achieved using the Pin-
Selected Rail States feature. This feature allows with
the use of up to 3 GPIs to enable and disable any
rail. This is useful for implementing system low-power
modes and the Advanced Configuration and Power
Interface (ACPI) specification that is used for
hardware devices.
The TI Fusion Digital Power™ designer software is
provided for device configuration. This PC-based
graphical user interface (GUI) offers an intuitive
interface for configuring, storing, and monitoring all
system operating parameters.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
UCD90160
VQFN (64)
9.00 mm × 9.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Application Schematic
12-V OUT
12 V
12-V OUT
3.3-V Supply
V33A V33D
2 Applications
• Industrial and ATE
• Telecommunications and networking equipment
• Servers and storage systems
• Systems requiring sequencing and monitoring of
multiple power rails
3 Description
The UCD90160 is a 16-rail PMBus/I2C addressable
power-supply sequencer and monitor. The device
integrates a 12-bit ADC for monitoring up to 16
power-supply voltage inputs. Twenty-six GPIO pins
can be used for power supply enables, power-on
reset signals, external interrupts, cascading, or other
system functions. Twelve of these pins offer PWM
functionality. Using these pins, the UCD90160 offers
support for margining, and general-purpose PWM
functions.
VOUT
3.3 V
VOUT
1.8 V
VOUT
0.8 V
WDI from main
processor
WDO
POWER_GOOD
WARN_OV_ 0.8 V
or WARN_OV_12 V
SYSTEM_RESET
Other sequencer
done (cascade input)
VMON
VMON
GPIO
VMON
GPIO
VMON
UCD90160
VMON
VMON
VMON
VMON
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
I2C/PMBUS
PWM
JTAG
VIN
VOUT
EN
DC-DC1
VFB
VOUT
3.3 V
VIN
VOUT
EN
VOUT 1.8 V
LDO1
VIN
VOUT
EN
DC-DC2
VFB
VOUT
0.8 V
2 MHz
VMARG
Closed loop
margining
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




 UCD90160
UCD90160
SLVSAC8D – NOVEMBER 2010 – REVISED APRIL 2019
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 4
6 Specifications......................................................... 8
6.1 Absolute Maximum Ratings ..................................... 8
6.2 ESD Ratings.............................................................. 8
6.3 Recommended Operating Conditions....................... 8
6.4 Thermal Information .................................................. 8
6.5 Electrical Characteristics........................................... 9
6.6 Timing Requirements: I2C/SMBus/PMBus.............. 10
6.7 Typical Characteristics ............................................ 11
7 Detailed Description ............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagram ....................................... 12
7.3 Feature Description................................................. 12
7.4 Device Functional Modes........................................ 18
7.5 Programming........................................................... 35
8 Application and Implementation ........................ 40
8.1 Application Information............................................ 40
8.2 Typical Application ................................................. 41
9 Power Supply Recommendations...................... 44
10 Layout................................................................... 44
10.1 Layout Guidelines ................................................. 44
10.2 Layout Example .................................................... 45
11 Device and Documentation Support ................. 47
11.1 Device Support...................................................... 47
11.2 Documentation Support ........................................ 47
11.3 Community Resources.......................................... 47
11.4 Trademarks ........................................................... 47
11.5 Electrostatic Discharge Caution ............................ 47
11.6 Glossary ................................................................ 47
12 Mechanical, Packaging, and Orderable
Information ........................................................... 47
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (August 2017) to Revision D
Page
• Updated Table 10 ................................................................................................................................................................. 37
• Clarified Step 8 in Design Requirements section ................................................................................................................. 42
Changes from Revision B (December 2015) to Revision C
Page
• Changed Layout Guidelines 1st bullet From "0.1-µF, X7R ....." To " 1-μF, X7R ceramic in parallel with 0.01-μF, X7R
ceramic at pin 47 (BPCAP)" ................................................................................................................................................. 44
Changes from Revision A (September 2011) to Revision B
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
• Changed second sentence in VOLTAGE MONITORING section FROM:....62, 63, and 63 TO: ...62, and 63.................... 20
• Deleted in second paragraph 'and 62.2 us to convert all 16 of the analog inputs.'.............................................................. 20
• Changed the first sentence, first paragraph in Fault Responses and Alert Processing FROM: Device
monitors....operation....TO: The UCD90160 monitors....normal operation. .......................................................................... 21
• Changed first list item in GPI Special Functions section FROM: Sequencing....good state. TO: GPI Fault
Enable....as a fault. ............................................................................................................................................................... 26
• Deleted Device Reset section. ............................................................................................................................................. 35
• Moved Device Configuration and Programming, JTAG Interface, and Internal Fault Management and Memory Error
Correction (ECC) sections into the Programming section.................................................................................................... 35
• Changed second sentence in first paragraph under Figure 27, per the Errata document. .................................................. 37
• Added new paragraph in JTAG Interface section. .............................................................................................................. 38
• Moved Estimating ADC Reporting Accuracy section, it now follows the Application Curves section. ................................ 43
2
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Product Folder Links: UCD90160
Copyright © 2010–2019, Texas Instruments Incorporated




 UCD90160
www.ti.com
UCD90160
SLVSAC8D – NOVEMBER 2010 – REVISED APRIL 2019
Changes from Original (November 2010) to Revision A
Page
• Changed Timing requirements table (tf) From: See (Note Rise Time) To: See (Note Fall Time) ........................................ 10
• Changed Timing requirements table (tr) From: See (Note Fall Time) To: See (Note Rise Time) ........................................ 10
Copyright © 2010–2019, Texas Instruments Incorporated
Product Folder Links: UCD90160
Submit Documentation Feedback
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