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Analog Switch. CD74HCT4316M Datasheet

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Analog Switch. CD74HCT4316M Datasheet
















CD74HCT4316M Switch. Datasheet pdf. Equivalent













Part

CD74HCT4316M

Description

Quad Analog Switch



Feature


Data sheet acquired from Harris Semicond uctor SCHS212D February 1998 - Revised October 2003 CD54HC4316, CD74HC4316, C D74HCT4316 High-Speed CMOS Logic Quad A nalog Switch with Level Translation [ /Title (CD74 HC431 6, CD74 HCT43 16) /S ubject (HighSpeed CMOS Features • Wi de Analog-Input-Voltage Range VCC - VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Manufacture

Texas Instruments

Datasheet
Download CD74HCT4316M Datasheet


Texas Instruments CD74HCT4316M

CD74HCT4316M; 0V to 10V • Low “ON” Resistance - 45Ω (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . . .VCC = 4.5V - 35Ω (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC = 6V - 30Ω (Typ) . . . . . . . . . . . . . . . . . . . . . . . VCC - VEE = 9V • Fast Switching and Propagation Delay Ti mes • Low “OFF” Leakage Current Built-In “Break-Before-Make” Switchin.


Texas Instruments CD74HCT4316M

g • Logic-Level Translation to Enable 5V Logic to Accommodate ±5V Analog Sig nals • Wide Operating Temperature Ran ge . . . -55oC to 125oC • HC Types - 2V to 10V Operation - High Noise Immuni ty: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibili ty, Il ≤ 1µA at VOL, VOH De.


Texas Instruments CD74HCT4316M

scription The ’HC4316 and CD74HCT4316 contain four independent digitally cont rolled analog switches that use silicon -gate CMOS technology to achieve operat ing speeds similar to LSTTL with the lo w power consumption of standard CMOS in tegrated circuits. In addition these d evices contain logic-level translation circuits that provide for analog signal switching of voltag.





Part

CD74HCT4316M

Description

Quad Analog Switch



Feature


Data sheet acquired from Harris Semicond uctor SCHS212D February 1998 - Revised October 2003 CD54HC4316, CD74HC4316, C D74HCT4316 High-Speed CMOS Logic Quad A nalog Switch with Level Translation [ /Title (CD74 HC431 6, CD74 HCT43 16) /S ubject (HighSpeed CMOS Features • Wi de Analog-Input-Voltage Range VCC - VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Manufacture

Texas Instruments

Datasheet
Download CD74HCT4316M Datasheet




 CD74HCT4316M
Data sheet acquired from Harris Semiconductor
SCHS212D
February 1998 - Revised October 2003
CD54HC4316, CD74HC4316,
CD74HCT4316
High-Speed CMOS Logic
Quad Analog Switch with Level Translation
[ /Title
(CD74
HC431
6,
CD74
HCT43
16)
/Sub-
ject
(High-
Speed
CMOS
Features
• Wide Analog-Input-Voltage Range
VCC - VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 10V
• Low “ON” Resistance
- 45(Typ) . . . . . . . . . . . . . . . . . . . . . . . . . . .VCC = 4.5V
- 35(Typ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC = 6V
- 30(Typ) . . . . . . . . . . . . . . . . . . . . . . . VCC - VEE = 9V
• Fast Switching and Propagation Delay Times
• Low “OFF” Leakage Current
• Built-In “Break-Before-Make” Switching
• Logic-Level Translation to Enable 5V Logic to
Accommodate ±5V Analog Signals
• Wide Operating Temperature Range . . . -55oC to 125oC
• HC Types
- 2V to 10V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
Description
The ’HC4316 and CD74HCT4316 contain four independent
digitally controlled analog switches that use silicon-gate
CMOS technology to achieve operating speeds similar to
LSTTL with the low power consumption of standard CMOS
integrated circuits.
In addition these devices contain logic-level translation
circuits that provide for analog signal switching of voltages
between ±5V via 5V logic. Each switch is turned on by a
high-level voltage on its select input (S) when the common
Enable (E) is Low. A High E disables all switches. The digital
inputs can swing between VCC and GND; the analog
inputs/outputs can swing between VCC as a positive limit
and VEE as a negative limit. Voltage ranges are shown in
Figures 2 and 3.
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
CD54HC4316F3A
-55 to 125
16 Ld CERDIP
CD74HC4316E
-55 to 125
16 Ld PDIP
CD74HC4316M
-55 to 125
16 Ld SOIC
CD74HC4316MT
-55 to 125
16 Ld SOIC
CD74HC4316M96
-55 to 125
16 Ld SOIC
CD74HC4316NSR
-55 to 125
16 Ld SOP
CD74HC4316PW
-55 to 125
16 Ld TSSOP
CD74HC4316PWR
-55 to 125
16 Ld TSSOP
CD74HC4316PWT
-55 to 125
16 Ld TSSOP
CD74HCT4316E
-55 to 125
16 Ld PDIP
CD74HCT4316M
-55 to 125
16 Ld SOIC
CD74HCT4316MT
-55 to 125
16 Ld SOIC
CD74HCT4316M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
Pinout
CD54HC4316 (CERDIP)
CD74HC4316 (PDIP, SOIC, SOP, TSSOP)
CD74HCT4316 (PDIP, SOIC)
TOP VIEW
1Z 1
1Y 2
2Y 3
2Z 4
2S 5
3S 6
E7
GND 8
16 VCC
15 1S
14 4S
13 4Z
12 4Y
11 3Y
10 3Z
9 VEE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1




 CD74HCT4316M
CD54HC4316, CD74HC4316, CD74HCT4316
Functional Diagram
15
1S
5
2S
6
3S
14
4S
VCC
16
LOGIC
LEVEL
CONV.
AND
CONTROL
7
E
8
9
GND VEE
TRUTH TABLE
INPUTS
E
S
L
L
L
H
H
X
H= High Level Voltage
L= Low Level Voltage
X= Don’t Care
2
1Y
1
1Z
3 2Y
4
2Z
11
3Y
10
3Z
12
4Y
13
4Z
SWITCH
OFF
ON
OFF
Logic Diagram
TO 3 OTHER
SWITCHES
VCC
LOGIC
E
LEVEL
CONV.
nS
VEE
nY
VEE
VCC
nZ
FIGURE 1. ONE SWITCH
2




 CD74HCT4316M
CD54HC4316, CD74HC4316, CD74HCT4316
Absolute Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Supply Voltage, VCC - VEE. . . . . . . . . . . . . . . . . . -0.5V to 10.5V
DC Supply Voltage, VEE . . . . . . . . . . . . . . . . . . . . . . . . 0.5V to -7V
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC 0.5V. . . . . . . . . . . . . . . . . . . . . . . .±20mA
DC Switch Diode Current, IOK
For VI < VEE -0.5V or VI < VCC + 0.5V . . . . . . . . . . . . . . . . .±25mA
DC Switch Diode Current
For VI > VEE -0.5V or VI < VCC + 0.5V . . . . . . . . . . . . . . . . .±25mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA
Thermal Information
Package Thermal Impedance, θJA (see Note 1):
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67oC/W
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73oC/W
NS (SOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64oC/W
PW (TSSOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . 108oC/W
Maximum Junction Temperature (Plastic Package) . . . . . . . . . 150o
Maximum Storage Temperature Range . . . . . . . . . . . -65oC to 150o
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . 300o
SOIC - Lead Tips Only
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, VCC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
Supply Voltage Range, VCC - VEE
HC, HCT Types (Figure 2) . . . . . . . . . . . . . . . . . . . . . . .2V to 10V
Supply Voltage Range, VEE
HC, HCT Types (Figure 3) . . . . . . . . . . . . . . . . . . . . . . . 0V to -6V
DC Input or Output Voltage, VI . . . . . . . . . . . . . . . . . . . GND to VCC
Analog Switch I/O Voltage, VIS. . . . . . . . . . . . . . . . . . . . . VEE (Min)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC (Max)
Input Rise and Fall Time, tr, tf
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Area as a Function of Supply Voltage
8
6
VCC - GND
(V) 4 HC
HCT
2
0
0 2 4 6 8 10 12
VCC - VEE (V)
FIGURE 2.
8
6
VCC - GND
(V) 4
HCT
HC
2
0
0 -2 -4 -6 -8
VEE - GND (V)
FIGURE 3.
3




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