Document
Datasheet
RA6M2 Group Datasheet
R01DS0357EJ0120 Rev.1.20
Dec 23, 2022
Leading performance 120-MHz Arm® Cortex®-M4 core, up to 1-MB code flash memory, 384-KB SRAM, Capacitive Touch Sensing Unit, Ethernet MAC Controller, USB 2.0 Full-Speed, SDHI, Quad SPI, security and safety features, and advanced analog.
Features
■ Arm Cortex-M4 Core with Floating Point Unit (FPU) Armv7E-M architecture with DSP instruction set Maximum operating frequency: 120 MHz Support for 4-GB address space On-chip debugging system: JTAG, SWD, and ETM Boundary scan and Arm Memory Protection Unit (Arm MPU)
■ Memory Up to 1-MB code flash memory (40 MHz zero wait states) 32-KB data flash memory (125,000 erase/write cycles) Up to 384-KB SRAM Flash Cache (FCACHE) Memory Protection Units (MPU) Memory Mirror Function (MMF) 128-bit unique ID
■ Connectivity Ethernet MAC Controller (ETHERC) Ethernet DMA Controller (EDMAC) USB 2.0 Full-Speed (USBFS) module - On-chip transceiver Serial Communications Interface (SCI) with FIFO × 10 Serial Peripheral Interface (SPI) × 2 I2C bus interface (IIC) × 3 Controller Area Network (CAN) × 2 Serial Sound Interface Enhanced (SSIE) SD/MMC Host Interface (SDHI) × 2 Quad Serial Peripheral Interface (QSPI) IrDA interface Sampling Rate Converter (SRC) External address space - 8-bit or 16-bit bus space is selectable per area - SDRAM support
■ Analog 12-bit A/D Converter (ADC12) with 3 sample-and-hold circuits each × 2 12-bit D/A Converter (DAC12) × 2 High-Speed Analog Comparator (ACMPHS) × 6 Temperature Sensor (TSN)
■ Timers General PWM Timer 32-bit Enhanced High Resolution (GPT32EH) × 4 General PWM Timer 32-bit Enhanced (GPT32E) × 4 General PWM Timer 32-bit (GPT32) × 6 Low Power Asynchronous General-Purpose Timer (AGT) × 2 Watchdog Timer (WDT)
■ Safety Error Correction Code (ECC) in SRAM SRAM parity error check Flash area protection ADC self-diagnosis function Clock Frequency Accuracy Measurement Circuit (CAC) Cyclic Redundancy Check (CRC) calculator Data Operation Circuit (DOC) Port Output Enable for GPT (POEG) Independent Watchdog Timer (IWDT) GPIO readback level detection Register write protection Main oscillator stop detection Illegal memory access
■ System and Power Management Low power modes Realtime Clock (RTC) with calendar and VBATT support Event Link Controller (ELC) DMA Controller (DMAC) × 8 Data Transfer Controller (DTC) Key Interrupt Function (KINT) Power-on reset Low Voltage Detection (LVD) with voltage settings
■ Security and Encryption AES128/192/256 3DES/ARC4 SHA1/SHA224/SHA256/MD5 GHASH RSA/DSA/ECC True Random Number Generator (TRNG)
■ Human Machine Interface (HMI) Capacitive Touch Sensing Unit (CTSU) Parallel Data Capture Unit (PDC)
■ Multiple Clock Sources Main clock oscillator (MOSC) (8 to 24 MHz) Sub-clock oscillator (SOSC) (32.768 kHz) High-speed on-chip oscillator (HOCO) (16/18/20 MHz) Middle-spe.