70V658

HIGH-SPEED 3.3V 128/64/32K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM 70V659/58/57S Features ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location ◆ High-speed access – Commercial: 10/12/15ns (max.) – Industrial: 12ns (max.) ◆ Dual chip enables allow for depth expansion without external logic ◆ IDT70V659/58/57 easily expands data bus width to 72 bits or more using the Master/Slave select when cascading more than one device ◆ M/S = VIH for BUSY output flag on Master, M/S = VIL for BUSY input on Slave ◆ Busy and Interrupt Flags ◆ On-chip port arbitration logic ◆ Full on-chip hardware support of semaphore signaling between ports ◆ Fully asynchronous operation from either port ◆ Separate byte controls for multiplexed bus and bus matching compatibility ◆ Supports JTAG features compliant to IEEE 1149.1 ◆ LVTTL-compatible, single 3.3V (±150mV) power supply for core ◆ LVTTL-compatible, selectable 3.3V (±150mV)/2.5V (±100mV) power supply for I/Os and control signals on each port ◆ Available in a 208-pin Plastic Quad Flatpack, 208-ball fine pitch Ball Grid Array, and 256-ball Ball Grid Array ◆ Industrial temperature range (–40°C to +85°C) is available for selected speeds ◆ Green parts available, see ordering information Functional Block Diagram BE3L BE3R BE2L BE2R BE1L BE0L BE1R BE0R R/WL CE0L CE1L BB BBBBBB EE EEEEEE 01 233210 L L L L RRRR R/WR CE0R CE1R OEL I/O0L- I/O35L Dout0-8_L Dout0-8_R Dout9-17_L Dout9-17_R Dout18-26_L Dout18-26_...