TPIC6595

TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS(on) . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of 250-mA Continuous Current D 1.5-A Pulsed Current Per Output D Output Clamp Voltage at 45 V D Devices Are Cascadable D Low Power Consumption description The TPIC6595 is a monolithic, high-voltage, highcurrent power 8-bit shift register designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK) respectively. The storage register transfers data to the output buffer when shiftregister clear (SRCLR) is high. When SRCLR is low, the input shift register is cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. The serial output (SER OUT) allows for cascading of the data from the shift register to additional devices. DW OR N PACKAGE (TOP VIEW) PGND 1 VCC 2 SER IN 3 DRAIN0 4 DRAIN1 5 DRAIN...