TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER
SLIS096A − APRIL 2000 − REVISED MAY 2005
D Low rDS(on) . . . 1.3 Ω Typ D Ava...
TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER
SLIS096A − APRIL 2000 − REVISED MAY 2005
D Low rDS(on) . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS
Transistor Outputs of
250-mA Continuous Current
D 1.5-A Pulsed Current Per Output D Output Clamp Voltage at 45 V D Enhanced Cascading for Multiple Stages D All Registers Cleared With Single Input D Low Power Consumption
description
DW OR N PACKAGE (TOP VIEW)
PGND 1 VCC 2
SER IN 3 DRAIN0 4 DRAIN1 5 DRAIN2 6 DRAIN3 7 SRCLR 8
G9 PGND 10
20 PGND 19 LGND 18 SER OUT 17 DRAIN7 16 DRAIN6 15 DRAIN5 14 DRAIN4 13 SRCK 12 RCK 11 PGND
The TPIC6596 is a monolithic, high-voltage, highcurrent power 8-bit shift register designed for use
logic symbol†
in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads.
G9 RCK 12
8 SRCLR
13 SRCK
EN3
C2 SRG8 R C1
This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK) respectively. The storage register transfers data to the output buffer when shift-register clear (SRCLR) is high. When SRCLR is low, all registers in the device are cleared. When output enable (G) is held high, all data in the output buf...