SN65LBC173

SN65LBC173, SN75LBC173 QUADRUPLE LOWĆPOWER DIFFERENTIAL LINE RECEIVERS D Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-422-B, EIA/TIA-423-B, RS-485, and ITU Recommendations V.10 and V.11. D Designed to Operate With Pulse Durations as Short as 20 ns D Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments D Input Sensitivity . . . ± 200 mV D Low-Power Consumption . . . 20 mA Max D Open-Circuit Fail-Safe Design D Pin Compatible With SN75173 and AM26LS32 SLLS170E − OCTOBER 1993 − REVISED AUGUST 2000 D OR N PACKAGE (TOP VIEW) 1B 1 1A 2 1Y 3 G4 2Y 5 2A 6 2B 7 GND 8 16 VCC 15 4B 14 4A 13 4Y 12 G 11 3Y 10 3A 9 3B description The SN65LBC173 and SN75LBC173 are monolithic quadruple differential line receivers with 3-state outputs. Both are designed to meet the requirements of the ANSI standards EIA/TIA-422-B, EIA/TIA-423-B, RS-485, and ITU Recommendations V.10 and V.11. The devices are optimized for balanced multipoint bus transmission at data rates up to and exceeding 10 million bits per second. The four receivers share two ORed enable inputs, one active when high, the other active when low. Each receiver features high input impedance, input hysteresis for increased noise immunity, and input sensitivity of ± 200 mV over a common-mode input voltage range of 12 V to −7 V. Fail-safe design ensures that if the inputs are open circuited, the output is always high. Both devices are designed using the Texas Instruments proprietary LinBiCMOS tech...