Document
SN55LBC175 QUADRUPLE LOW-POWER DIFFERENTIAL LINE RECEIVER
D Meets EIA Standards RS-422-A, RS-423-A,
RS-485, and CCITT V.11
D Designed to Operate With Pulse Durations
as Short as 20 ns
D Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments
D Input Sensitivity . . . ± 200 mV D Low-Power Consumption . . . 20 mA Max D Open-Circuit Fail-Safe Design D Common-Mode Input Voltage Range of
– 7 V to 12 V
SGLS083A – MARCH 1995 – REVISED JUNE 2000
J OR W PACKAGE (TOP VIEW)
1B 1 1A 2 1Y 3 1, 2EN 4 2Y 5 2A 6 2B 7 GND 8
16 VCC 15 4B 14 4A 13 4Y 12 3, 4EN 11 3Y 10 3A 9 3B
description
The SN55LBC175 is a monolithic quadruple differential line receiver with 3-state outputs and is designed to meet the requirements of the EIA Standards RS-422-A, RS-423-A, RS-485, and CCITT V.11. This device is optimized for balanced multipoint bus transmission at data rates up to and exceeding 10 million bits per second. The receivers are enabled in pairs with an active-high enable input. Each differential receiver input features high impedance, hysteresis for increased noise immunity, and sensitivity of ± 200 mV over a common-mode input voltage range of 12 V to –7 V. Fail-safe design ensures that if the inputs are open-circuited, the outputs are always high. This device is designed using the Texas Instruments proprietary LinBiCMOS™ technology allowing low power consumption, high switching speeds, and robustness.
FK PACKAGE (TOP VIEW)
1A 1B NC VCC 4B
3 2 1 20 19
1Y 4
18 4A
1, 2EN 5
17 4Y
NC 6
16 NC
2Y 7
15 3, 4EN
2A 8
14 3Y
9 10 11 12 13
2B GND
NC 3B 3A
NC – No internal connection
This device offers optimum performance when used with the SN55LBC174 quadruple line driver. The SN55LBC175 is available in the 16-pin CDIP (J) package, a 16-pin CPAK (W) package, or a 20-pin LCCC (FK) package.
The SN55LBC175 is characterized over the military temperature range of – 55°C to 125°C.
FUNCTION TABLE (each receiver)
DIFFERENTIAL INPUTS A–B
ENABLE
OUTPUT Y
VID ≥ 0.2 V
H
H
– 0.2 V < VID < 0.2 V
H
?
VID ≤ – 0.2 V
H
L
X
L
Z
Open circuit
H
H
H = high level, L = low level, X = irrelevant, Z = high impedance (off), ? = indeterminate
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2000, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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SN55LBC175 QUADRUPLE LOW-POWER DIFFERENTIAL LINE RECEIVER
SGLS083A – MARCH 1995 – REVISED JUNE 2000
logic symbol†
logic diagram (positive logic)
4
1, 2EN
EN
2 1A
1 1B
6 2A
7 2B
12
3, 4EN
EN
3 1Y
5 2Y
10 3A
.