Document
D Operating Voltage Range of 4.5 V to 5.5 V D State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
D Output Ports Have Equivalent 33-Ω Series
Resistors, So No External Resistors Are Required
D 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
description/ordering information
The ’BCT2244 devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the ’BCT2240 devices and SN74BCT2241, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs. These devices feature high fan-out and improved fan-in.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The outputs, which are designed to source or sink up to 12 mA, include 33-Ω series resistors to reduce overshoot and undershoot.
2Y1 GND 2A1 1Y4 2A2
SN54BCT2244, SN74BCT2244 OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS017D − SEPTEMBER 1988 − REVISED MARCH 2003
SN54BCT2244 . . . J OR W PACKAGE SN74BCT2244 . . . DW, N, OR NS PACKAGE
(TOP VIEW)
1OE 1 1A1 2 2Y4 3 1A2 4 2Y3 5 1A3 6 2Y2 7 1A4 8 2Y1 9 GND 10
20 VCC 19 2OE 18 1Y1 17 2A4 16 1Y2 15 2A3 14 1Y3 13 2A2 12 1Y4 11 2A1
SN54BCT2244 . . . FK PACKAGE (TOP VIEW)
2Y4 1A1 1OE VCC 2OE
3 2 1 20 19
1A2 4
18 1Y1
2Y3 5
17 2A4
1A3 6
16 1Y2
2Y2 7
15 2A3
1A4
8
14
9 10 11 12 13
1Y3
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE PART NUMBER
TOP-SIDE MARKING
PDIP − N
Tube
SN74BCT2244N
SN74BCT2244N
0°C to 70°C
SOIC − DW
Tube Tape and reel
SN74BCT2244DW SN74BCT2244DWR
BCT2244
SOP − NS
Tape and reel SN74BCT2244NSR
BCT2244
CDIP − J
Tube
SNJ54BCT2244J
SNJ54BCT2244J
−55°C to 125°C CFP − W
Tube
SNJ54BCT2244W
SNJ54BCT2244W
LCCC − FK
Tube
SNJ54BCT2244FK
SNJ54BCT2244FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265 • POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
1
SN54BCT2244, SN74BCT2244
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS017D − SEPTEMBER 1988 − REVISED MARCH 2003
FUNCTION TABLE (each buffer)
INPUTS
OE
A
OUTPUT Y
L
H
H
L
L
L
H
X
Z
logic diagram (positive logic)
1 1OE
1A1 2
4 1A2
1A3 6 8
1A4
18 1Y1 16
1Y2 14 1Y3 12 1Y4
19 2OE
11 2A1
13 2A2 2A3 15 2A4 17
9 2Y1
7 2Y2
5 2Y3 3 2Y4
2
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265 • POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
schematic of Y outputs
SN54BCT2244, SN74BCT2244 OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS017D − SEPTEMBER 1988 − REVISED MARCH 2003
VCC
Output
GND
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . . −0.5 V to 5.5 V Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC Input clamp current, IIK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 mA Package thermal impedance, θJA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W Storage temperature r.