SN74BCT543

SN54BCT543, SN74BCT543 OCTAL REGISTERED TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCBS026C − NOVEMBER 1988 − REVISED APRIL 1994 State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State True Outputs Back-to-Back Registers for Storage ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 Package Options Include Plastic Small-Outline Packages (DW), Ceramic Chip Carriers (FK) and Flatpacks (W), and Plastic and Ceramic 300-mil DIPs (JT, NT) description The ′BCT543 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. SN54BCT543 . . . JT OR W PACKAGE SN74BCT543 . . . DW OR NT PACKAGE (TOP VIEW) LEBA 1 OEBA 2 A1 3 A2 4 A3 5 A4 6 A5 7 A6 8 A7 9 A8 10 CEAB 11 GND 12 24 VCC 23 CEBA 22 B1 21 B2 20 B3 19 B4 18 B5 17 B6 16 B7 15 B8 14 LEAB 13 OEAB SN54BCT543 . . . FK PACKAGE (TOP VIEW) A1 OEBA LEBA NC VCC CEBA B1 The A-to-B enable (CEAB) input must be low in order to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the CEB...