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N-Channel MOSFET. HUF75329D3S Datasheet

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N-Channel MOSFET. HUF75329D3S Datasheet






HUF75329D3S MOSFET. Datasheet pdf. Equivalent




HUF75329D3S MOSFET. Datasheet pdf. Equivalent





Part

HUF75329D3S

Description

N-Channel MOSFET



Feature


Data Sheet HUF75329D3S October 2013 N- Channel UltraFET Power MOSFET 55 V, 20 A, 26 mΩ These N-Channel power MOSFET s are manufactured using the innovative UltraFET process. This advanced proces s technology achieves the lowest possib le onresistance per silicon area, resul ting in outstanding performance. This d evice is capable of withstanding high e nergy in the avalanc.
Manufacture

ON Semiconductor

Datasheet
Download HUF75329D3S Datasheet


ON Semiconductor HUF75329D3S

HUF75329D3S; he mode and the diode exhibits very low reverse recovery time and stored charge . It was designed for use in applicatio ns where power efficiency is important, such as switching regulators, switchin g converters, motor drivers, relay driv ers, low-voltage bus switches, and powe r management in portable and batteryope rated products. Formerly developmental type TA75329. Ord.


ON Semiconductor HUF75329D3S

ering Information PART NUMBER HUF75329D 3ST PACKAGE TO-252AA BRAND 75329D Fe atures • 20A, 55V • Simulation Mode ls - Temperature Compensated PSPICE® a nd SABER™ Models - SPICE and SABER Th ermal Impedance Models Available on the WEB at: www.onsemi.com • Peak Curren t vs Pulse Width Curve • UIS Rating C urve • Related Literature - TB334, Guidelines for Soldering Surface.


ON Semiconductor HUF75329D3S

Mount Components to PC Boards” Symbol D Packaging JEDEC TO-252AA G S GAT E SOURCE DRAIN (FLANGE) ©2001 Semico nductor Components Industries, LLC. Oct ober-2017, Rev. 3 Publication Order Nu mber: HUF75329D3S/D HUF75329D3S Absol ute Maximum Ratings TC = 25oC, Unless O therwise Specified Drain to Source Vol tage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . .

Part

HUF75329D3S

Description

N-Channel MOSFET



Feature


Data Sheet HUF75329D3S October 2013 N- Channel UltraFET Power MOSFET 55 V, 20 A, 26 mΩ These N-Channel power MOSFET s are manufactured using the innovative UltraFET process. This advanced proces s technology achieves the lowest possib le onresistance per silicon area, resul ting in outstanding performance. This d evice is capable of withstanding high e nergy in the avalanc.
Manufacture

ON Semiconductor

Datasheet
Download HUF75329D3S Datasheet




 HUF75329D3S
Data Sheet
HUF75329D3S
October 2013
N-Channel UltraFET Power MOSFET
55 V, 20 A, 26 mΩ
These N-Channel power MOSFETs are manufactured
using the innovative UltraFET process. This advanced
process technology achieves the lowest possible on-
resistance per silicon area, resulting in outstanding
performance. This device is capable of withstanding high
energy in the avalanche mode and the diode exhibits very
low reverse recovery time and stored charge. It was
designed for use in applications where power efficiency is
important, such as switching regulators, switching
converters, motor drivers, relay drivers, low-voltage bus
switches, and power management in portable and battery-
operated products.
Formerly developmental type TA75329.
Ordering Information
PART NUMBER
HUF75329D3ST
PACKAGE
TO-252AA
BRAND
75329D
Features
• 20A, 55V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Models
- SPICE and SABER Thermal Impedance Models
Available on the WEB at: www.onsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
Packaging
JEDEC TO-252AA
G
S
GATE
SOURCE
DRAIN
(FLANGE)
©2001 Semiconductor Components Industries, LLC.
October-2017, Rev. 3
Publication Order Number:
HUF75329D3S/D




 HUF75329D3S
HUF75329D3S
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . .
Derate Above 25oC
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PD
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Operating and Storage Temperature . . . . . . . . . . . . . . . . . .TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . Tpkg
55
55
±20
20
Figure 4
Figure 6
128
0.86
-55 to 175
300
260
UNITS
V
V
V
A
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
THERMAL SPECIFICATIONS
SYMBOL
TEST CONDITIONS
BVDSS
IDSS
IGSS
ID = 250µA, VGS = 0V (Figure 11)
VDS = 50V, VGS = 0V
VDS = 45V, VGS = 0V, TC = 150oC
VGS = ±20V
VGS(TH)
rDS(ON)
VGS = VDS, ID = 250µA (Figure 10)
ID = 20A, VGS = 10V (Figure 9)
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
SWITCHING SPECIFICATIONS (VGS = 10V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
RθJC
RθJA
tON
td(ON)
tr
td(OFF)
tf
tOFF
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Reverse Transfer Capacitance
Qg(TOT)
Qg(10)
Qg(TH)
Qgs
Qgd
(Figure 3)
TO-252
VDD = 30V, ID 20A,
RL = 1.5, VGS = 10V,
RGS = 9.1
VGS = 0V to 20V
VGS = 0V to 10V
VGS = 0V to 2V
VDD = 30V,
ID 20A,
RL = 1.5
Ig(REF) = 1.0mA
(Figure 13)
MIN TYP MAX UNITS
55
-
-
V
-
-
1
µA
-
-
250
µA
-
-
±100
nA
2
-
4
V
-
0.022 0.026
-
-
1.17 oC/W
-
-
100
oC/W
-
-
60
ns
-
7
-
ns
-
30
-
ns
-
10
-
ns
-
33
-
ns
-
-
65
ns
-
50
65
nC
-
32
40
nC
-
2.0
2.5
nC
-
5
-
nC
-
13
-
nC
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22




 HUF75329D3S
HUF75329D3S
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
CISS
COSS
CRSS
VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 12)
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovered Charge
SYMBOL
VSD
trr
QRR
TEST CONDITIONS
ISD = 20A
ISD = 20A, dISD/dt = 100A/µs
ISD = 20A, dISD/dt = 100A/µs
Typical Performance Curves
MIN TYP MAX UNITS
-
1060
-
pF
-
405
-
pF
-
95
-
pF
MIN
TYP
MAX UNITS
-
-
1.25
V
-
-
68
ns
-
-
120
nC
1.2
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125 150
175
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
25
20
15
10
5
0
25
50
75
100
125
150
175
TC, CASE TEMPERATURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
2
DUTY CYCLE - DESCENDING ORDER
0.5
1 0.2
0.1
0.05
0.02
0.01
0.1
0.0110-5
SINGLE PULSE
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (s)
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
100
101
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
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