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PHASE-LOCKED LOOP. TLC2932A Datasheet

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PHASE-LOCKED LOOP. TLC2932A Datasheet






TLC2932A LOOP. Datasheet pdf. Equivalent




TLC2932A LOOP. Datasheet pdf. Equivalent





Part

TLC2932A

Description

HIGH-PERFORMANCE PHASE-LOCKED LOOP



Feature


TLC2932A HIGH PERFORMANCE PHASE LOCKED L OOP D VCO (Voltage-Controlled Oscillat or): − Complete Oscillator Using Only One External Bias Resistor (RBIAS) − Lock Frequency: 13 MHz to 32 MHz (VDD = 3 V +5%, TA = –205C to 755C, x1 Out put) 13 MHz to 35 MHz (VDD = 3.3 V +5%, TA = –205C to 755C, x1 Output) 15 MH z to 55 MHz (VDD = 5 V +5%, TA = –205 C to 755C, x1 Output) − Sele.
Manufacture

Texas Instruments

Datasheet
Download TLC2932A Datasheet


Texas Instruments TLC2932A

TLC2932A; ctable Output Frequency D PFD (Phase Fre quency Detector): High Speed, Edge-Trig gered Detector with Internal Charge Pum p SLES150 − OCTOBER 2005 D Independe nt VCO, PFD Power-Down Mode D Thin Smal l-Outline Package (14 Terminal) D CMOS Technology D Pin Compatible TLC2932IPW 14-PIN TSOP (PW PACKAGE) (TOP VIEW) L OGIC VDD 1 SELECT 2 VCO OUT 3 FIN −A 4 FIN −B 5 P.


Texas Instruments TLC2932A

FD OUT 6 LOGIC GND 7 14 VCO VDD 13 RBIAS 12 VCO IN 11 VCO GND 10 V CO INHIBIT 9 PFD INHIBIT 8 TEST de scription The TLC2932A is designed for phase-locked loop (PLL) systems and is composed of a voltage-controlled oscill ator (VCO) and an edge-triggered type p hase frequency detector (PFD). The osci llation frequency range of the VCO is s et by an external .


Texas Instruments TLC2932A

bias resistor (RBIAS). The VCO has a 1/2 frequency divider at the output stage. The high speed PFD with internal charg e pump detects the phase difference bet ween the reference frequency input and signal frequency input from the externa l counter. Both the VCO and the PFD hav e inhibit functions, which can be used as power-down mode. Due to the TLC2932A high speed and st.

Part

TLC2932A

Description

HIGH-PERFORMANCE PHASE-LOCKED LOOP



Feature


TLC2932A HIGH PERFORMANCE PHASE LOCKED L OOP D VCO (Voltage-Controlled Oscillat or): − Complete Oscillator Using Only One External Bias Resistor (RBIAS) − Lock Frequency: 13 MHz to 32 MHz (VDD = 3 V +5%, TA = –205C to 755C, x1 Out put) 13 MHz to 35 MHz (VDD = 3.3 V +5%, TA = –205C to 755C, x1 Output) 15 MH z to 55 MHz (VDD = 5 V +5%, TA = –205 C to 755C, x1 Output) − Sele.
Manufacture

Texas Instruments

Datasheet
Download TLC2932A Datasheet




 TLC2932A
TLC2932A
HIGH PERFORMANCE PHASE LOCKED LOOP
D VCO (Voltage-Controlled Oscillator):
− Complete Oscillator Using Only One
External Bias Resistor (RBIAS)
− Lock Frequency:
13 MHz to 32 MHz (VDD = 3 V +5%,
TA = –205C to 755C, x1 Output)
13 MHz to 35 MHz (VDD = 3.3 V +5%,
TA = –205C to 755C, x1 Output)
15 MHz to 55 MHz (VDD = 5 V +5%,
TA = –205C to 755C, x1 Output)
− Selectable Output Frequency
D PFD (Phase Frequency Detector):
High Speed, Edge-Triggered Detector
with Internal Charge Pump
SLES150 − OCTOBER 2005
D Independent VCO, PFD Power-Down Mode
D Thin Small-Outline Package (14 Terminal)
D CMOS Technology
D Pin Compatible TLC2932IPW
14-PIN TSOP (PW PACKAGE)
(TOP VIEW)
LOGIC VDD
1
SELECT
2
VCO OUT
3
FIN −A
4
FIN −B
5
PFD OUT
6
LOGIC GND
7
14
VCO VDD
13
RBIAS
12
VCO IN
11
VCO GND
10
VCO INHIBIT
9
PFD INHIBIT
8
TEST
description
The TLC2932A is designed for phase-locked loop (PLL) systems and is composed of a voltage-controlled
oscillator (VCO) and an edge-triggered type phase frequency detector (PFD). The oscillation frequency range
of the VCO is set by an external bias resistor (RBIAS). The VCO has a 1/2 frequency divider at the output stage.
The high speed PFD with internal charge pump detects the phase difference between the reference frequency
input and signal frequency input from the external counter. Both the VCO and the PFD have inhibit functions,
which can be used as power-down mode. Due to the TLC2932A high speed and stable oscillation capability,
the TLC2932A is suitable for use as a high-performance PLL.
TA
–20°C to 75°C
AVAILABLE OPTIONS
PACKAGE
SMALL OUTLINE (PW)
TLC2932AIPW
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
TI.COM
Copyright 2005, Texas Instruments Incorporated
1




 TLC2932A
TLC2932A
HIGH PERFORMANCE PHASE LOCKED LOOP
SLES150 − OCTOBER 2005
functional block diagram
FIN−A
FIN−B
PFD INHIBIT
4
5
Phase
Frequency
6
9 Detector
PFD OUT
VCO IN
BIAS
VCO INHIBIT
SELECT
12
13 Voltage
3
10
Controlled
Oscillator
2
VCO OUT
TERMINAL
NAME
NO.
LOGIC VDD
1
SELECT
2
VCO OUT
3
FIN−A
4
FIN−B
5
PFD OUT
6
LOGIC GND
7
TEST
8
PFD INHIBIT
9
VCO INHIBIT 10
VCO GND
11
VCO IN
12
RBIAS
13
VCO VDD
14
Terminal Functions
I/O
DESCRIPTION
Power supply for the internal logic. This power supply should be separated from VCO VDD to reduce
cross-coupling between supplies.
I
VCO output frequency select. When SELECT is high, the VCO output frequency is ×1/2 and when
low. The output frequency is ×1.
O VCO output. When the VCO INHIBIT is high, VCO output is low.
I
Input reference frequency f(REF IN) is applied to FIN−A.
I
Input for VCO external counter output frequency f(FIN−B). FIN−B is nominally provided from the
external counter.
O PFD output. When the PFD INHIBIT is high, PFD output is in the high-impedance state.
GND for the internal logic.
Connect to GND.
I
PFD inhibit control. When PFD INHIBIT is high, PFD output is in the high-impedance state.
I
VCO inhibit control. When VCO INHIBIT is high, VCO output is low.
GND for VCO.
I
VCO control voltage input. Nominally the external loop filter output connects to VCO IN to control
VCO oscillation frequency.
I
Bias supply. An external resistor (RBIAS) between VCO VDD and RBIAS supplies bias for adjusting the
oscillation frequency range.
Power supply for VCO. This power supply should be separated from LOGIC VDD to reduce
cross-coupling between supplies.
2
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 TLC2932A
TLC2932A
HIGH PERFORMANCE PHASE LOCKED LOOP
SLES150 − OCTOBER 2005
detailed description
VCO oscillation frequency
The VCO oscillation frequency is determined by an external register (RBIAS) connected between the VCO VDD
and the BIAS terminals. The oscillation frequency and range depends on this resister value. For the lock
frequency range refer to the recommended operating conditions. Figure 1 shows the typical frequency variation
and VCO control voltage.
VCO Oscillation Frequency Range
Bias Resistor (RBIAS)
1/2 VDD
VCO Control Voltage (VCO IN)
Figure 1. Oscillation Frequency
VCO output frequency 1/2 divider
The TLC2932A SELECT terminal sets the fOSC VCO output frequency as shown in Table 1. The 1/2 fOSC output
should be used for minimum VCO output jitter.
Table 1. VCO Output 1/2 Divider Function
VCO inhibit function
SELLECT
Low
High
VCO OUTPUT
fOSC
1/2 fOSC
The VCO has an externally controlled inhibit function which inhibit the VCO output. A high level on the VCO
INHIBIT terminal stops the VCO oscillation and powers down the VCO. The output maintains a low level during
the power−down mode as shown in Table 2.
Table 2. VCO Inhibit Function
VCO INHIBIT
Low
High
PFD operation
VCO OSCILLATOR
Active
Stopped
VCO OUT
Active
Low level
IDD(VCO)
Normal
Power Down
The PFD is a high-speed, edge-triggered detector with an internal charge pump. The PFD detects the phase
difference between two frequency inputs supplied to FIN−A and FIN−B as shown in Figure 2. Normally the
reference is supplied to FIN−A and the frequency from the external counter output is fed to FIN−B. For clock
recovery PLL system, other types of phase detectors should be used.
TI.COM
3



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