TLV320AIC24K

www.ti.com TLV320AIC20, TLV320AIC21 TLV320AIC24, TLV320AIC25 TLV320AIC20K, TLV320AIC24K SLAS363D – MARCH 2002 – REVISED APRIL 2005 Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC FEATURES Stereo 16-Bit Oversampling Sigma-Delta A/D Converter Stereo 16-Bit Oversampling Sigma-Delta D/A Converter Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock Selectable FIR/IIR Filter With Bypassing Option Programmable Sampling Rate up to: – Max 26 Ksps With On-Chip IIR/FIR Filter – Max 104 Ksps With IIR/FIR Bypassed On-Chip FIR Produced 84-dB SNR for ADC and 92-dB SNR for DAC over 13-Khz BW Smart Time Division Multiplexed (SMARTDM®) Serial Port – Glueless 4-Wire Interface to DSP – Automatic Cascade Detection (ACD) Self-Generates Master/Slave Device Addresses – Programming Mode to Allow On-The-Fly Reconfiguration – Continuous Data Transfer Mode to Minimize Bit Clock Speed – Support Different Sampling Rate for Each Device – Turbo Mode to Maximize Bit Clock For Faster Data Transfer and Allow Multiple Serial Devices to Share the Same Bus – Allows up to Eight Devices to be Connected to a Single Serial Port Host port – 2-Wire Interface – Selectable I2C or S2C Differential and Single-Ended Analog Input/Output Built-In Analog Functions: – Analog and Digital Sidetone – Antialiasing Filter (AAF) – Programmable Input and Output Gain Control (PGA) – Microphone/Handset/Headset Amplifiers – AIC20/21/20K Have...