Document
TLV2721, TLV2721Y Advanced LinCMOS RAILĆTOĆRAIL VERY LOWĆPOWER SINGLE OPERATIONAL AMPLIFIERS
SLOS197A − AUGUST1997 − REVISED MARCH 2001
D Output Swing Includes Both Supply Rails D Low Noise . . . 19 nV/√Hz Typ at f = 1 kHz D Low Input Bias Current . . . 1 pA Typ D Fully Specified for Single-Supply 3-V and
5-V Operation
D Very Low Power . . . 110 µA Typ D Common-Mode Input Voltage Range
Includes Negative Rail
D Wide Supply Voltage Range
2.7 V to 10 V
D Macromodel Included
DBV PACKAGE (TOP VIEW)
OUT
1
5
VDD− /GND
VDD+
2
IN +
3
4
IN−
description
The TLV2721 is a single low-voltage operational amplifier available in the SOT-23 package. It offers a compromise between the ac performance and output drive of the TLV2731 and the micropower TLV2711.
It consumes only 150 µA (max) of supply current and is ideal for battery-powered applications. The device exhibits rail-to-rail output performance for increased dynamic range in single- or split-supply applications. The TLV2721 is fully characterized at 3 V and 5 V and is optimized for low-voltage applications.
The TLV2721, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for high-impedance sources, such as piezoelectric transducers. Because of the micropower dissipation levels combined with 3-V operation, these devices work well in hand-held monitoring and remote-sensing applications. In addition, the rail-to-rail output feature with single or split supplies makes this family a great choice when interfacing with analog-to-digital converters (ADCs).
With a total area of 5.6mm2, the SOT-23 package only requires one third the board space of the standard 8-pin SOIC package. This ultra-small package allows designers to place single amplifiers very close to the signal source, minimizing noise pick-up from long PCB traces.
AVAILABLE OPTIONS
PACKAGED DEVICES
TA
VIOmax AT 25°C
SOT-23 (DBV)†
0°C to 70°C
3 mV
TLV2721CDBV
−40°C to 85°C
3 mV
TLV2721IDBV
† The DBV package available in tape and reel only. ‡ Chip forms are tested at TA = 25°C only.
SYMBOL
VAKC VAKI
CHIP FORM‡
(Y)
TLV2721Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2001, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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TLV2721, TLV2721Y Advanced LinCMOS RAILĆTOĆRAIL VERY LOWĆPOWER SINGLE OPERATIONAL AMPLIFIERS
SLOS197A − AUGUST1997 − REVISED MARCH 2001
TLV2721Y chip information
This chip, when properly assembled, displays characteristics similar to the TLV2721C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
(5)
(1)
VDD +
(2)
(3)
IN +
+
(4)
IN −
−
(1) OUT
(5)
VDD −/ GND
CHIP THICKNESS: 10 MILS TYPICAL
46
BONDING PADS: 4 × 4 MILS MINIMUM
(2)
TJmax = 150°C
TOLERANCES ARE ± 10%.
ALL DIMENSIONS ARE IN MILS.
PIN (2) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP.
(4)
(3)
31
2
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
equivalent schematic
Q3
TLV2721, TLV2721Y Advanced LinCMOS RAILĆTOĆRAIL VERY LOWĆPOWER SINGLE OPERATIONAL AMPLIFIERS
SLOS197A − AUGUST1997 − REVISED MARCH 2001
VDD +
Q6
Q9
Q12
Q14
Q16
R7
C2
IN +
IN −
Q1
Q4
R6 C1
R5
Q13
Q2
Q5
R3
R4
Q7
Q8
Q10
Q11 R1
VDD −/ GND
COMPONENT COUNT†
Transistors
23
Diodes
5
Resistors
11
Capacitors
2
† Includes both amplifiers and all ESD, bias, and trim circuitry
OUT
Q15
Q17
R2
D1
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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TLV2721, TLV2721Y Advanced LinCMOS RAILĆTOĆRAIL VERY LOWĆPOWER SINGLE OPERATIONAL AMPLIFIERS
SLOS197A − AUGUST1997 − REVISED MARCH 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VDD Input voltage range, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . .