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SN74LVC1G97
SCES416N – DECEMBER 2002 – REVISED JANUARY 2017
SN74LVC1G97 Configurable Multiple-Function Gate
1 Features
•1 ESD Protection Exceeds JESD 22 – 2000-V Human Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101)
• Available in the Texas Instruments NanoFree™ Package
• Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Supports Down Translation to VCC • Max tpd of 6.3 ns at 3.3 V • Low Power Consumption, 10-µA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Insertion, Partial-Power-Down
Mode, and Back-Drive Protection • Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II • Choose From Nine Specific Logic Functions
2 Applications
• Barcode Scanners • Cable Solutions • E-Books • Embedded PCs • Field Transmitter: Temperature or Pressure
Sensors • Fingerprint Biometrics • HVAC: Heating, Ventilating, and Air Conditioning • Network-Attached Storage (NAS) • Server Motherboards and PSUs • Software Defined Radios (SDR) • TVs: High Definition (HDTV), LCD, and Digital • Video Communications Systems • Wireless Data Access Cards, Headsets,
Keyboard, Mouse, and LAN Cards
3 Description
The SN74LVC1G97 device features configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All inputs can be connected to VCC or GND.
This configurable multiple-function gate is designed for 1.65-V to 5.5-V VCC operation.
This device functions as an independent gate, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negativegoing (VT–) signals.
NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74LVC1G97DBV SOT-23 (6)
2.90 mm × 1.60 mm
SN74LVC1G97DCK SC70 (6)
2.00 mm × 1.25 mm
SN74LVC1G97DRL
1.60 mm × 1.20 mm
SN74LVC1G97DRY SOT (6)
1.45 mm × 1.00 mm
SN74LVC1G97DSF
1.00 mm × 1.00 mm
SN74LVC1G97YZP DSBGA (6)
1.41 mm × 0.91 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
Logic Diagram (Positive Logic)
3 In0
1 In1
4 Y
6 In2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74LVC1G97
SCES416N – DECEMBER 2002 – REVISED JANUARY 2017
www.ti.com
Table of Contents
1 Features .................................................................. 1 2 Applications ...................................................