Single Bus Buffer Gate
D Controlled Baseline
− One Assembly/Test Site, One Fabrication Site
D Enhanced Diminishing Manufacturing
Sources (DMS) ...
Description
D Controlled Baseline
− One Assembly/Test Site, One Fabrication Site
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification D Qualification Pedigree† D Supports 5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 3.7 ns at 3.3 V
† Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
SN74LVC1G126ĆEP SINGLE BUS BUFFER GATE
WITH 3ĆSTATE OUTPUT
SCES527A − DECEMBER 2003 − REVISED MAY 2004
D Low Power Consumption, 10-µA Max ICC D ±24-mA Output Drive at 3.3 V D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101)
DCK PACKAGE (TOP VIEW)
OE 1 A2
GND 3
5 VCC 4Y
description/ordering information
This single bus buffer gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G126 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is low.
To ensure the high-impe...
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