ICS853S012I

12:1, Differential-to-3.3V, 2.5V LVPECL Clock/Data Multiplexer ICS853S012I Datasheet Description The ICS853S012I is an 12:1 Differential-to-3.3V or 2.5V LVPECL Clock/Data Multiplexer which can operate up to 3.2GHz. The ICS853S012I has twelve differential selectable clock inputs. The CLK, nCLK input pairs can accept LVPECL, LVDS or CML levels. The fully differential architecture and low propagation delay make the device ideal for use in clock distribution circuits. The select pins have internal pull-down resistors. Features High speed 12:1 differential multiplexer One differential 3.3V or 2.5V LVPECL output Twelve selectable differential clock or data inputs CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML Maximum output frequency: 3.2GHz Translates any single ended input signal to LVPECL levels with resistor bias on nCLKx input Additive phase jitter, RMS: 0.144ps (typical) Part-to-part skew: 250ps (maximum) Propagation delay: 1.15ns (maximum) Full 3.3V or 2.5V operating supply modes -40°C to 85°C ambient operating temperature Available lead-free (RoHS 6) package Block Diagram CLK0 Pulldown nCLK0 Pullup/Pulldown CLK1 Pulldown nCLK1 Pullup/Pulldown CLK2 Pulldown nCLK2 Pullup/Pulldown Q nQ CLK11 Pulldown nCLK11 Pullup/Pulldown SEL[3:0] ©2017 Integrated Device Technology, Inc. Pin Assignment nCLK1 CLK1 nCLK0 CLK0 CLK11 nCLK11 CLK10 nCLK10 32 31 30 29 28 27 26 25 CLK2 1 24 CLK9 nCLK2 2 23 nCLK9 VCC 3 22 SE...