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54ACT16541 Dataheets PDF



Part Number 54ACT16541
Manufacturers Texas Instruments
Logo Texas Instruments
Description 16-BIT BUFFERS/DRIVERS
Datasheet 54ACT16541 Datasheet54ACT16541 Datasheet (PDF)

D Members of the Texas Instruments Widebus™ Family D Inputs Are TTL-Voltage Compatible D Flow-Through Architecture Optimizes PCB Layout D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process D 500-mA Typical Latch-Up Immunity at 125°C D Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-m.

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D Members of the Texas Instruments Widebus™ Family D Inputs Are TTL-Voltage Compatible D Flow-Through Architecture Optimizes PCB Layout D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process D 500-mA Typical Latch-Up Immunity at 125°C D Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings description The ’ACT16541 are noninverting 16-bit buffers composed of two 8-bit sections with separate output-enable signals. For either 8-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 8-bit buffer section are in the high-impedance state. 54ACT16541, 74ACT16541 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUPUTS SCAS208A – JUNE 1992 – REVISED APRIL 1996 54ACT16541 . . . WD PACKAGE 74ACT16541 . . . DL PACKAGE (TOP VIEW) 1OE1 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 1Y5 8 1Y6 9 GND 10 1Y7 11 1Y8 12 2Y1 13 2Y2 14 GND 15 2Y3 16 2Y4 17 VCC 18 2Y5 19 2Y6 20 GND 21 2Y7 22 2Y8 23 2OE1 24 48 1OE2 47 1A1 46 1A2 45 GND 44 1A3 43 1A4 42 VCC 41 1A5 40 1A6 39 GND 38 1A7 37 1A8 36 2A1 35 2A2 34 GND 33 2A3 32 2A4 31 VCC 30 2A5 29 2A6 28 GND 27 2A7 26 2A8 25 2OE2 The 74ACT16541 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The 54ACT16541 is characterized for operation over the full military temperature range of –55°C to 125°C. The 74ACT16541 is characterized for operation from –40°C to 85°C. FUNCTION TABLE (each 8-bit section) INPUTS OE1 OE2 A OUTPUT Y L L L L L L H H H X X Z X H X Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and Widebus are trademarks of Texas Instruments Incorporated. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright © 1996, Texas Instruments Incorporated 1 54ACT16541, 74ACT16541 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUPUTS SCAS208A – JUNE 1992 – REVISED APRIL 1996 logic symbol† 1 1OE1 48 1OE2 24 2OE1 25 2OE2 47 1A1 46 1A2 44 1A3 43 1A4 41 1A5 40 1A6 38 1A7 37 1A8 36 2A1 35 2A2 33 2A3 32 2A4 30 2A5 29 2A6 27 2A7 26 2A8 & EN1 & EN2 11 12 2 1Y1 3 1Y2 5 1Y3 6 1Y4 8 1Y5 9 1Y6 11 1Y7 12 1Y8 13 2Y1 14 2Y2 16 2Y3 17 2Y4 19 2Y5 20 2Y6 22 2Y7 23 2Y8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) 1OE1 1 1OE2 48 1A1 47 2 1Y1 24 2OE1 2OE2 25 36 2A1 13 2Y1 To Seven Other Channels To Seven Other Channels 2 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 54ACT16541, 74ACT16541 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUPUTS SCAS208A – JUNE 1992 – REVISED APRIL 1996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±400 mA Maximum package power dissipation at TA = 55°C (in still air) (see Note 2): DL package . . . . . . . . . . . 1.2 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any.


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