OCTAL BUFFER/LINE DRIVER
D Inputs Are TTL-Voltage Compatible D Flow-Through Architecture Optimizes
PCB Layout
D Center-Pin VCC and GND Configurat...
Description
D Inputs Are TTL-Voltage Compatible D Flow-Through Architecture Optimizes
PCB Layout
D Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic
Small-Outline (DW) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (NT)
description
74ACT11240 OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS
SCAS210A − MAY 1987 − REVISED APRIL 1996
DB, DW, OR NT PACKAGE (TOP VIEW)
1Y1 1 1Y2 2 1Y3 3 1Y4 4 GND 5 GND 6 GND 7 GND 8 2Y1 9 2Y2 10 2Y3 11 2Y4 12
24 1OE 23 1A1 22 1A2 21 1A3 20 1A4 19 VCC 18 VCC 17 2A1 16 2A2 15 2A3 14 2A4 13 2OE
This octal buffer or line driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. This device provides inverting outputs and symmetrical active-low output-enable (OE) inputs. This device features high fan-out and improved fan-in.
The 74ACT11240 is characterized for operation from −40°C to 85°C.
FUNCTION TABLE (each buffer)
INPUTS
OE
A
OUTPUT Y
L
H
L
L
L
H
H
X
Z
logic symbol†
24 1OE
23 1A1
22 1A2
21 1A3
20 1A4
EN 1
1 1Y1
2 1Y2
3 1Y3
4 1Y4
13 2OE
17 2A1
16 2A2
15 2A3
14 2A4
EN 1
9 2Y1
10 2Y2
11 2Y3
12 2Y4
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
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