OCTAL BUFFER/LINE DRIVER
D 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
D Inputs Are TTL-Voltage Compatible D Flow-Through ...
Description
D 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
D Inputs Are TTL-Voltage Compatible D Flow-Through Architecture Optimizes
PCB Layout
D Center-Pin VCC and GND Configurations to
Minimize High-Speed Switching Noise
D EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 300-mil DIPs (NT)
74ACT11244 OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS
SCAS006C − AUGUST 1987 − REVISED APRIL 1996
DB, DW, NT, OR PW PACKAGE (TOP VIEW)
1Y1 1
1Y2 2 1Y3 3 1Y4 4 GND 5 GND 6 GND 7 GND 8 2Y1 9 2Y2 10 2Y3 11 2Y4 12
24 1OE
23 1A1
22 1A2
21 1A3 20 1A4 19 VCC 18 VCC 17 2A1 16 2A2 15 2A3 14 2A4 13 2OE
description
ThIs octal buffer or line driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the ’ACT11240, this device provides the choice of various combinations of inverting and noninverting outputs.
The 74ACT11244 is characterized for operation from −40°C to 85°C.
FUNCTION TABLE
OUTPUT ENABLE
1OE, 2OE
DATA INPUT
A
OUTPUT Y
H
X
Z
L
L
L
L
H
H
logic symbol†
24
1OE
EN
13
2OE
EN
23
1A1
20
22
1A2
21
1A3
20
1A4
1 1Y1
2 1Y2
3 1Y3
4 1Y4
17 2A1
16 2A2
15 2A3
14 2A4
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Public...
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