ADC12D040

ADC12D040 www.ti.com SNAS171E – JUNE 2002 – REVISED MARCH 2013 ADC12D040 Dual 12-Bit, 40 MSPS, 600 mW A/D Converter with Internal/External Reference Check for Samples: ADC12D040 FEATURES 1 2 Binary or 2’s Complement Output Format Single Supply Operation Internal Sample-and-Hold Outputs 2.4V to 5V Compatible Power Down Mode Pin-Compatible with ADC12DL066 Internal/External Reference APPLICATIONS Ultrasound and Imaging Instrumentation Communications Receivers Sonar/Radar xDSL Cable Modems KEY SPECIFICATIONS SNR (fIN = 10 MHz): 68 dB (typ) ENOB (fIN = 10 MHz): 10.9 bits (typ) SFDR (fIN = 10 MHz): 80 dB (typ) Data Latency: 6 Clock Cycles Supply Voltage: +5V ±5% Power Consumption, Operating – (Operating): 600 mW (typ) – (Power Down Mode): 75 mW (typ) DESCRIPTION The ADC12D040 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 40 Megasamples per second (Msps), minimum. This converter uses a differential, pipeline architecture with digital error correction and an onchip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 5V power supply, the ADC12D040 achieves 10.9 effective bits at 10 MHz input and consumes just 600 mW at 40 Msps, including the reference current. The Power Down feature reduces power consumption to 75 mW. The differential inputs provide a full scale different...