ADC12L066

ADC12L066 www.ti.com SNAS153I – NOVEMBER 2001 – REVISED MARCH 2013 ADC12L066 12-Bit, 66 MSPS, 450 MHz Bandwidth A/D Converter with Internal Sample-andHold Check for Samples: ADC12L066 FEATURES 1 23 Single Supply Operation Low Power Consumption Power Down Mode On-Chip Reference Buffer APPLICATIONS Ultrasound and Imaging Instrumentation Cellular Base Stations/Communications Receivers Sonar/Radar xDSL Wireless Local Loops Data Acquisition Systems DSP Front Ends KEY SPECIFICATIONS Resolution: 12 Bits Conversion Rate: 66 Msps Full Power Bandwidth: 450 MHz DNL: ±0.4 LSB (typ) SNR (fIN = 10 MHz): 66 dB (typ) SFDR (fIN = 10 MHz): 80 dB (typ) Data Latency: 6 Clock Cycles Supply Voltage: +3.3V ± 300 mV Power Consumption, 66 MHz: 357 mW (typ) DESCRIPTION The ADC12L066 is a monolithic CMOS analog-todigital converter capable of converting analog input signals into 12-bit digital words at 66 Megasamples per second (Msps), minimum, with typical operation possible up to 80 Msps. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 450 MHz. Operating on a single 3.3V power supply, this device consumes just 357 mW at 66 Msps, including the reference current. The Power Down feature reduces power consumption to just 50 mW. The...